System and method of providing multiple antennas to track satellite movement

    公开(公告)号:US11237242B1

    公开(公告)日:2022-02-01

    申请号:US16927833

    申请日:2020-07-13

    Abstract: An example system can include a first antenna having a first orientation, a second antenna having a second orientation and a control system communicating with the first antenna and the second antenna. The control system performs operations which can include determining a pathway of a satellite, comparing the pathway to a first radiation pattern of the first antenna and a second radiation pattern of the second antenna, wherein the first antenna and the second antenna are each positioned such that a first keyhole of the first antenna does not overlap a second keyhole of the second antenna, to yield a comparison and selecting, based on the comparison, one of the first antenna or the second antenna to communicate with the satellite along the pathway.

    POWER DISTRIBUTION OVER ETHERNET CONNECTION

    公开(公告)号:US20210377059A1

    公开(公告)日:2021-12-02

    申请号:US17332960

    申请日:2021-05-27

    Abstract: In an embodiment, an apparatus includes a source device including a first current limiter and a second current limiter in parallel with each other and a first transformer and a second transformer; a load device includes a third transformer and a fourth transformer in parallel with each other; and an Ethernet cable is electrically coupled between the source device and the load device, the Ethernet cable including first twisted pair lines and second twisted pair lines. A direct current (DC) voltage is provided to the first current limiter and the second current limiter, the first transformer is electrically coupled to an output of the first current limiter, and the second transformer is electrically coupled to an output of the second current limiter. The DC voltage is transmitted to the third transformer and the fourth transformer in parallel with each other via the first twisted pair lines and the second twisted pair lines. The first twisted pair lines and second twisted pair lines are included in an Ethernet cable electrically coupled between the source device and the load device.

    PHASE LOCK LOOP (PLL) SYNCHRONIZATION

    公开(公告)号:US20210376837A1

    公开(公告)日:2021-12-02

    申请号:US17401208

    申请日:2021-08-12

    Abstract: In an embodiment, an apparatus includes a first integrated circuit (IC) chip configured to receive a timing signal and a reference clock signal; and a second IC chip configured to receive the timing signal and the reference clock signal. The first and second IC chips are configured to generate respective first and second reference time signals based on the timing signal and the reference clock signal. The first and second IC chips include a respective first phase lock loop (PLL) and second PLL. The first PLL and the second PLL are synchronized to each other based on the first reference time signal and the second reference time signal.

    HIERARCHICAL NETWORK SIGNAL ROUTING APPARATUS AND METHOD

    公开(公告)号:US20190252755A1

    公开(公告)日:2019-08-15

    申请号:US16276360

    申请日:2019-02-14

    CPC classification number: H01P5/19

    Abstract: In embodiments, a power splitter/combiner includes a first electrically conductive trace included in a first layer; second and third electrically conductive traces included in a second layer; a first via electrically coupled to the first and second electrically conductive traces; and a second via electrically coupled to the first and third electrically conductive traces. A first portion of the first electrically conductive trace comprises a first port of the power splitter/combiner. A second portion of the first electrically conductive trace, the first via, and the second electrically conductive trace comprises a second port of the power splitter/combiner. A third portion of the first electrically conductive trace, the second via, and the third electrically conductive trace comprises a third port of the power splitter/combiner.

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