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公开(公告)号：US20090327674A1
公开(公告)日：2009-12-31
申请号：US12147893
申请日：2008-06-27
IPC分类号： G06F9/30
CPC分类号： G06F8/4452 , G06F9/30072 , G06F9/325 , G06F9/3853 , G06F9/3885
摘要： Loop control systems and methods are disclosed. In a particular embodiment, a hardware loop control logic circuit includes a detection unit to detect an end of loop indicator of a program loop. The hardware loop control logic circuit also includes a decrement unit to decrement a loop count and to decrement a predicate trigger counter. The hardware loop control logic circuit further includes a comparison unit to compare the predicate trigger counter to a reference to determine when to set a predicate value.
摘要翻译： 公开了回路控制系统和方法。 在特定实施例中，硬件回路控制逻辑电路包括检测单元以检测程序循环的循环指示符的结束。 硬件回路控制逻辑电路还包括递减单元，用于递减循环计数并递减谓词触发计数器。 硬件循环控制逻辑电路还包括比较单元，用于将谓词触发计数器与参考值进行比较，以确定何时设置谓词值。
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公开(公告)号：US20090216993A1
公开(公告)日：2009-08-27
申请号：US12037300
申请日：2008-02-26
CPC分类号： G06F9/3851 , G06F9/34 , G06F9/3824 , G06F9/3828 , G06F9/3885
摘要： In an embodiment, a method is disclosed that includes, comparing, during a write back stage at an execution unit, a write identifier associated with a result to be written to a register file from execution of a first instruction to a read identifier associated with a second instruction at an execution pipeline within an interleaved multi-threaded (IMT) processor having multiple execution units. When the write identifier matches the read identifier, the method further includes storing the result at a local memory of the execution unit for use by the execution unit in the subsequent read stage.
摘要翻译： 在一个实施例中，公开了一种方法，其包括：在执行单元的回写阶段期间，将与将被写入寄存器文件的结果相关联的写入标识符从执行第一指令到与第一指令相关联的读取标识符进行比较 在具有多个执行单元的交错多线程（IMT）处理器内的执行流水线处的第二指令。 当写入标识符与读取标识符匹配时，该方法还包括将结果存储在执行单元的本地存储器中，供执行单元在随后的读取阶段中使用。
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公开(公告)号：US20120017214A1
公开(公告)日：2012-01-19
申请号：US12837572
申请日：2010-07-16
IPC分类号： G06F9/46
CPC分类号： G06F9/3851 , G06F9/30123 , G06F9/30134 , G06F9/3806
摘要： A system and method of managing a stack shared by multiple threads of a processor includes allocating a first portion of a shared stack to a first thread and allocating a second portion of the shared stack to a second thread.
摘要翻译： 管理由处理器的多个线程共享的堆栈的系统和方法包括将共享堆栈的第一部分分配给第一线程，并将共享堆栈的第二部分分配给第二线程。
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34.发明申请Associating Data for Events Occurring in Software Threads with Synchronized Clock Cycle Counters 失效关联数据，发生与同步时钟周期计数器的软件线程中的事件公开(公告)号：US20100299668A1
公开(公告)日：2010-11-25
申请号：US12468114
申请日：2009-05-19
申请人： Suresh K. Venkumahanti , Robert Shuicheong Chan , Prasanna Kumar Balasundaram , Louis Achille Giannini
发明人： Suresh K. Venkumahanti , Robert Shuicheong Chan , Prasanna Kumar Balasundaram , Louis Achille Giannini
IPC分类号： G06F9/46
CPC分类号： G06F11/3632
摘要： Methods, apparatuses, and computer-readable storage media are disclosed for reducing power by reducing hardware-thread toggling in a multi-processor. In a particular embodiment, a method is disclosed that includes collecting data from a plurality of software threads being processed by a processor, where the data for each of the events includes a value of an associated clock cycle counter upon occurrence of the event. Data is correlated for the events occurring for each of the plurality of threads by starting each of a plurality of clock cycle counters associated with the software threads at a common time. Alternatively, data is correlated for the events by logging a synchronizing event within each of the plurality of software threads.
摘要翻译： 公开了用于通过减少多处理器中的硬件线程切换来降低功率的方法，装置和计算机可读存储介质。 在特定实施例中，公开了一种方法，其包括从由处理器处理的多个软件线程收集数据，其中每个事件的数据在事件发生时包括相关联的时钟周期计数器的值。 通过在公共时间启动与软件线程相关联的多个时钟周期计数器中的每一个，数据与针对多个线程中的每一个发生的事件相关。 或者，通过在多个软件线程的每一个内记录同步事件来将数据与事件相关联。
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公开(公告)号：US08880958B2
公开(公告)日：2014-11-04
申请号：US13237071
申请日：2011-09-20
IPC分类号： G06F11/273 , G06F11/36
CPC分类号： G06F11/3636 , G06F11/3656
摘要： Systems and method for embedded trace macrocell (ETM) devices configured to dynamically interleave architecture/program tracing with microarchitecture/hardware tracing. An ETM device includes logic to enable interleaved program tracing and hardware state sampling. A core interface is configured to receive program trace and hardware state information of a microprocessor and a combining module is configured to interleave the program trace and hardware state information. A packet generation module may be configured to packetize the program trace and hardware state information into packets at operational speeds of the microprocessor.
摘要翻译： 嵌入式跟踪宏小区（ETM）设备的系统和方法被配置为使用微架构/硬件跟踪来动态地交织架构/程序跟踪。 ETM设备包括启用交错的程序跟踪和硬件状态采样的逻辑。 核心接口被配置为接收微处理器的程序跟踪和硬件状态信息，并且组合模块被配置为交织程序跟踪和硬件状态信息。 分组生成模块可以被配置为以微处理器的操作速度将程序跟踪和硬件状态信息分组成分组。
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公开(公告)号：US20130073910A1
公开(公告)日：2013-03-21
申请号：US13237071
申请日：2011-09-20
IPC分类号： G06F11/30
CPC分类号： G06F11/3636 , G06F11/3656
摘要： Systems and method for embedded trace macrocell (ETM) devices configured to dynamically interleave architecture/program tracing with microarchitecture/hardware tracing. An ETM device includes logic to enable interleaved program tracing and hardware state sampling. A core interface is configured to receive program trace and hardware state information of a microprocessor and a combining module is configured to interleave the program trace and hardware state information. A packet generation module may be configured to packetize the program trace and hardware state information into packets at operational speeds of the microprocessor.
摘要翻译： 嵌入式跟踪宏小区（ETM）设备的系统和方法被配置为使用微架构/硬件跟踪来动态地交织架构/程序跟踪。 ETM设备包括启用交错的程序跟踪和硬件状态采样的逻辑。 核心接口被配置为接收微处理器的程序跟踪和硬件状态信息，并且组合模块被配置为交织程序跟踪和硬件状态信息。 分组生成模块可以被配置为以微处理器的操作速度将程序跟踪和硬件状态信息分组成分组。
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37.发明授权Associating data for events occurring in software threads with synchronized clock cycle counters 失效将软件线程中发生的事件与同步时钟周期计数器相关联公开(公告)号：US08578382B2
公开(公告)日：2013-11-05
申请号：US12468114
申请日：2009-05-19
申请人： Suresh K. Venkumahanti , Robert Shuicheong Chan , Prasanna Kumar Balasundaram , Louis Achille Giannini
发明人： Suresh K. Venkumahanti , Robert Shuicheong Chan , Prasanna Kumar Balasundaram , Louis Achille Giannini
IPC分类号： G06F9/46
CPC分类号： G06F11/3632
摘要： Methods, apparatuses, and computer-readable storage media are disclosed for reducing power by reducing hardware-thread toggling in a multi-processor. In a particular embodiment, a method is disclosed that includes collecting data from a plurality of software threads being processed by a processor, where the data for each of the events includes a value of an associated clock cycle counter upon occurrence of the event. Data is correlated for the events occurring for each of the plurality of threads by starting each of a plurality of clock cycle counters associated with the software threads at a common time. Alternatively, data is correlated for the events by logging a synchronizing event within each of the plurality of software threads.
摘要翻译： 公开了用于通过减少多处理器中的硬件线程切换来降低功率的方法，装置和计算机可读存储介质。 在特定实施例中，公开了一种方法，其包括从由处理器处理的多个软件线程收集数据，其中每个事件的数据在事件发生时包括相关联的时钟周期计数器的值。 通过在公共时间启动与软件线程相关联的多个时钟周期计数器中的每一个，数据与针对多个线程中的每一个发生的事件相关。 或者，通过在多个软件线程的每一个内记录同步事件来将数据与事件相关联。
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