公开(公告)号：US11662447B2

公开(公告)日：2023-05-30

申请号：US16678830

申请日：2019-11-08

Applicant: BFLY OPERATIONS, INC.

Inventor： Kailiang Chen ,  Chao Chen ,  Keith G. Fife

IPC: H03F3/45 ,  G01S7/52 ,  H03F3/187 ,  G01S15/89

CPC classification number: G01S7/52025 ,  G01S15/8906 ,  H03F3/187 ,  H03F3/45183 ,  H03F2200/129 ,  H03F2200/141 ,  H03F2200/228

Abstract: A variable-current trans-impedance amplifier (TIA) for an ultrasound device is described. The TIA may be coupled to an ultrasonic transducer to amplify an output signal of the ultrasonic transducer representing an ultrasound signal received by the ultrasonic transducer. During acquisition of the ultrasound signal by the ultrasonic transducer, one or more current sources in the TIA may be varied. The variable-current trans-impedance amplifier may include multiple stages, including a first stage having N-P transistor pairs configured to receive an input signal and produce a single-ended amplified signal.

公开(公告)号：US11375980B2

公开(公告)日：2022-07-05

申请号：US16404672

申请日：2019-05-06

Applicant: BFLY Operations, Inc.

Inventor： Kailiang Chen ,  Nevada J. Sanchez ,  Susan A. Alie ,  Tyler S. Ralston ,  Jonathan M. Rothberg ,  Keith G. Fife ,  Joseph Lutsky

IPC: H04B1/06 ,  A61B8/08 ,  H04B11/00 ,  A61B8/00

Abstract: Aspects of the technology described herein relate to an ultrasound device including a first die that includes an ultrasonic transducer, a first application-specific integrated circuit (ASIC) that is bonded to the first die and includes a pulser, and a second ASIC in communication with the second ASIC that includes integrated digital receive circuitry. In some embodiments, the first ASIC may be bonded to the second ASIC and the second ASIC may include analog processing circuitry and an analog-to-digital converter. In such embodiments, the second ASIC may include a through-silicon via (TSV) facilitating communication between the first ASIC and the second ASIC. In some embodiments, SERDES circuitry facilitates communication between the first ASIC and the second ASIC and the first ASIC includes analog processing circuitry and an analog-to-digital converter. In some embodiments, the technology node of the first ASIC is different from the technology node of the second ASIC.