-
公开(公告)号：US20210407358A1
公开(公告)日：2021-12-30
申请号：US16963444
申请日：2019-10-18
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: A shift register unit includes a first node connection branch, an ON/OFF control circuit and a third node control circuit. A first end of the first node connection branch is electrically connected to first node, and a second end of the first node connection branch is electrically connected to a third node. The first node connection branch is configured to control the first node to be electrically connected to the third node under the control of a potential at the first node. The ON/OFF control circuit is configured to control the third node to be electrically connected to a first voltage end under the control of the potential at the first node. The third node control circuit is configured to reset a potential at the third node under the control of a resetting signal from a resetting end and a potential at a second node.
-
公开(公告)号：US20210335266A1
公开(公告)日：2021-10-28
申请号：US16623653
申请日：2019-05-23
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G11C19/28
Abstract: A shift register unit, a driving method thereof, a gate driver and a display device are provided. The shift register unit includes a first input circuit, an output circuit and a charging enhancement circuit. The first input circuit is configured to charge a first node in response to a first input signal; the output circuit is configured to output, under control of a level of the first node, a shift signal for a row-by-row shift of scanning and a first output signal for driving one row of sub-pixel units in a display panel to perform display scanning; and the charging enhancement circuit is configured to further enhance the level of the first node in response to a charging enhancement signal. The shift register unit may enhance the level of the first node and the reliability of the gate driver and the display device consisted of the shift register unit.
-
公开(公告)号：US20210210154A1
公开(公告)日：2021-07-08
申请号：US16645733
申请日：2019-01-09
Inventor： Xuehuan FENG , Yongqian LI
IPC: G11C19/28 , G09G3/3258
Abstract: A shift register is provided, which includes a blanking input circuit, a blanking control circuit, a blanking pull-down circuit, and a shift register circuit. The blanking input circuit may provide a blanking input signal to a first control node according to a second clock signal. The blanking control circuit may provide a first clock signal to a second control node and maintain a voltage difference between the first control node and the second control node, according to a voltage of the first control node. The blanking pull-down circuit may provide a voltage of the second control node to a pull-down node according to the first clock signal. The shift register circuit may provide a shift signal via a shift signal output terminal and a first drive signal via a first drive signal output terminal according to a voltage of the pull-down node.
-
公开(公告)号：US20210209987A1
公开(公告)日：2021-07-08
申请号：US16768536
申请日：2020-01-20
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: The present disclosure provides a gate driving unit and method, a gate driving module and circuit, and a display device. The gate driving unit includes: an external compensation control signal output terminal, a gate driving signal output terminal, an external compensation control signal output circuit, a gate driving signal output circuit, a pull-up control circuit and a pull-down node control circuit. The pull-up control circuit is configured to, under control of an enabling signal input by an enabling terminal and a current-stage driving signal, control a potential at a first node; under control of the potential at the first node, a first clock signal input by a first clock signal terminal, a second clock signal input by a second clock signal terminal and a potential at a pull-down node, control a potential at a pull-up control node; under control of the potential at the pull-up control node, control a potential at a pull-up node, thereby controlling the potential at the pull-up node to be an effective voltage in a preset time period of a blank time period.
-
公开(公告)号：US20210201810A1
公开(公告)日：2021-07-01
申请号：US16966205
申请日：2020-01-20
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G09G3/3233 , G11C19/28
Abstract: A display panel, a display device, and a drive method are provided. The display panel includes a plurality of sub-pixel units (40) arranged in an array and a gate drive circuit, and the array includes N rows. The gate drive circuit includes a plurality of cascaded shift register units and N+1 output terminals arranged in sequence, each of the plurality of cascaded shift register units is configured to output a gate scan signal for driving at least two rows of sub-pixel units in the N rows of the array to work; pixel drive circuits of an (n)-th row of sub-pixel units are connected to an (n)-th output terminal of the gate drive circuitto receive the gate scan signal as a scan drive signal, and sensing circuits of the (n)-th row of sub-pixel units are connected to an (n+1)-th output terminal of the gate drive circuit.
-
Patent Agency Ranking
公开(公告)号：US20210201809A1
公开(公告)日：2021-07-01
申请号：US16965124
申请日：2020-01-19
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/3266 , G09G3/3225 , G11C19/28
Abstract: A shift register unit, a gate driving circuit, a display device and a driving method are provided. The shift register unit includes a first input circuit, an output circuit, a first control circuit, a first reset circuit, a second input circuit, a transmission circuit, and a storage circuit. The first input circuit is configured to control a level of a first node, he output circuit is configured to provide an output signal at an output terminal, the first control circuit is configured to control a level of a second node under control of the level of the first node, the first reset circuit is configured to reset the first node and the output terminal under control of the level of the second node, and the storage circuit is electrically connected to the second node, and is configured to stabilize the level of the second node.
-
公开(公告)号：US20210201805A1
公开(公告)日：2021-07-01
申请号：US16754200
申请日：2019-09-26
Inventor： Xuehuan FENG , Can YUAN , Yongqian LI
IPC: G09G3/3266 , G09G3/3275 , G09G3/3258
Abstract: An electronic panel, a display device and a driving method are disclosed. In the electronic panel, each row of subpixel units is divided into a plurality of subpixel unit groups, and each subpixel unit group includes a first subpixel unit and a second subpixel unit. The first subpixel unit includes a first light emitter unit, a first pixel driving circuit for driving the first light emitter unit to emit light, and a first sensing circuit for sensing the first pixel driving circuit; the second subpixel unit includes a second light emitter unit, a second pixel driving circuit for driving the second light emitter unit to emit light, and a second sensing circuit for sensing the second pixel driving circuit.
-
公开(公告)号：US20210201751A1
公开(公告)日：2021-07-01
申请号：US16957161
申请日：2019-08-08
Inventor： Xuehuan FENG , Yongqian LI
IPC: G09G3/20
Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, a first control circuit, a blanking control circuit, a first output circuit, and a second output circuit. The input circuit is configured to control a level of a first node in response to an input signal input; the first control circuit is configured to control a level of the second node in response to the input signal and the level of the first node; the blanking control circuit is configured to control the level of the first node and the level of the second node; the first output circuit is configured to output a first output signal at the first output terminal; and the second output circuit is configured to output a second output signal at the second output terminal.
-
公开(公告)号：US20210167155A1
公开(公告)日：2021-06-03
申请号：US16063774
申请日：2017-12-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Pan XU , Yongqian LI , Zhidong YUAN , Zhenfei CAI , Can YUAN , Meng LI
IPC: H01L27/32 , H01L29/786 , H01L51/52 , H01L29/40
Abstract: A thin-film transistor includes a substrate, and a light-shielding layer and an active layer sequentially over the substrate. The light-shielding layer has an accommodating space having a bottom wall and a side wall on an upper surface thereof. An orthographic projection of the active layer on the substrate is contained within an orthographic projection of the accommodating space of the light-shielding layer on the substrate. An upper side of the side wall of the accommodating space of the light-shielding layer has a larger distance to the substrate than a bottom surface, and optionally has an equal or larger distance to the substrate than a top surface, of the active layer. The light-shielding layer can comprise a gate electrode. As such, lights from an underneath and from a lateral side of the thin-film transistor that otherwise reach the active layer can be partially or completely blocked.
-
公开(公告)号：US20200035315A1
公开(公告)日：2020-01-30
申请号：US16504652
申请日：2019-07-08
Inventor： Zhidong YUAN , Yongqian LI , Can YUAN , Meng LI , Xuelian CHENG
Abstract: A shift register unit includes an input module, a first output module, a first pull-down module, a reset module, and a leakage-proof module. The input module is coupled to a pull-up node, a control signal terminal, and an input signal terminal. The first output module is coupled to the pull-up node, a first output terminal, and a second clock signal terminal. The first pull-down module is coupled to the first output terminal, a first signal terminal, and a first clock signal terminal. The reset module is coupled to a reset signal terminal, the pull-up node, and the first output terminal. The leakage-proof module is coupled to a second signal terminal, the first node, and the pull-up node.
-
-
-
-
-
-
-
-
-
Search Results
264
records
(took 0.026 seconds)
