Abstract:
The present disclosure provides an array substrate, a manufacturing method thereof and a display device. The array substrate comprises a base substrate; a signal line and an electrode arranged in different layers on the base substrate, and an insulating layer located between the signal line and the electrode. The array substrate further comprises a dielectric film located between the signal line and the insulating layer, the dielectric film covering the signal line; and/or a dielectric film located between the electrode and the insulating layer, the dielectric film covering the electrode.
Abstract:
The present disclosure provides a display substrate, its testing method and its manufacturing method. A first testing terminal is connected to a gate electrode of a first TFT, a second testing terminal is connected to a source electrode of the first TFT and a drain electrode of a second TFT, a third testing terminal is connected to a gate electrode of the second TFT, and a fourth testing terminal is connected to a drain electrode of the first TFT and a source electrode of the second TFT.
Abstract:
The present application discloses a shift register, a gate driving circuit and a driving method thereof, and a display apparatus. The shift register includes an input sub-circuit, an output sub-circuit, a reset control sub-circuit, a pull-up node reset sub-circuit, and an output signal reset sub-circuit; the input sub-circuit is configured to pre-charge the pull-up node under the control of a signal input to the first signal input terminal; the output sub-circuit is configured to output, through the signal output terminal, a signal input to the first clock signal input terminal under the control of a potential of the pull-up node; the reset control sub-circuit is configured to control, under the control of a reset signal input to the second signal input terminal, whether the pull-up node reset sub-circuit and the output signal reset sub-circuit operate to reset the pull-up node and the signal output terminal, respectively.
Abstract:
A shift register unit, a driving method thereof, a gate driving circuit and a display device are provided. The shift register unit includes: an input circuit configured to control a voltage applied to a first pull-up node; a timing controller circuit coupled to the first pull-up node and a second pull-up node, and configured to control a voltage applied to the second pull-up node based on the voltage applied to the first pull-up node; a first output circuit configured to control a voltage applied to a first output end; a second output circuit configured to control a voltage applied to a second output end; a pull-down control circuit configured to control a voltage applied to a pull-down node; a first pull-down circuit configured to control the voltage applied to the first pull-up node; and a second pull-down circuit configured to control the voltage applied to the second pull-up node.
Abstract:
The present disclosure relates to a display substrate comprising a substrate; a data line disposed over the substrate; a first insulating layer disposed on the data line; a second insulating layer disposed on the first insulating layer; a first transparent electrode disposed on the second insulating layer. The present disclosure further relates to a manufacturing method of a display substrate and a display device.
Abstract:
Embodiments of the present disclosure provide a shift register unit and a driving method thereof, and a gate driving circuit. The shift register unit includes an input circuit, a next-stage start circuit, a control circuit, a stabilization circuit, and at least one output circuit. The at least one output circuit each can control a voltage of a signal output terminal according to a voltage of a pull-up node, a voltage of a pull-down node, a first voltage signal, a control clock signal from a control clock signal terminal, and a control voltage signal from a control voltage signal terminal. A high level of a second clock signal begins when a high level of a first clock signal ends, and a high level of a third clock signal begins when a high level of the second clock signal ends.
Abstract:
A brightness compensation method for a display apparatus, and a display apparatus are disclosed. The brightness compensation method includes: for each row of display units, turning on the row S times during a display time of one frame; inputting, to each display unit in the row a pixel data signal of the frame corresponding to the display unit, when the row is turned on for the i-th time; inputting, to a to-be-compensated display unit in the row, a compensation signal, and controlling other display unit than the to-be-compensated display unit in the row to present black, when the row is turned on for each time other than the i-th time; wherein both S and i are integers, S≥2, 1≤i≤S; for every two adjacent rows of display units, a time interval of same turning-ons of the latter and the former is the same.
Abstract:
A detecting method and a detecting apparatus for detection of a gate line disconnection. The gate line disconnection detecting method includes step 1: providing a first unit (41) at least capable of receiving signals at one end of a gate line to be detected (2), and providing a second unit (42) at least capable of transmitting signals at the other end of it; step 2: providing a first signal receiving unit (51) for receiving signals on a gate line other than the gate line to be detected (2). With respect to the gate line disconnection detecting method, whether disconnection occurs or not is judged depending on the signal strength received by the first signal receiving unit (51), and thus, the case that in a gate line disconnection detection of a bilateral drive type display device, whether a gate line is disconnected or not can be accurately detected, is realized. By it, technical supports are provided for getting rid of bad products timely, and a goal of promoting the yield of products is achieved.
Abstract:
A thin film transistor structure and a manufacturing method thereof, a circuit structure, a display substrate and a display device are provided. The thin film transistor structure includes: a base plate, and a first thin film transistor and a second thin film transistor stacked on the base plate. The first thin film transistor and the second thin film transistor share a same active layer.
Abstract:
The present disclosure provides a display panel, a method for manufacturing the display panel and a display device. The display panel includes a first substrate and a second substrate arranged opposite to each other. A spacer is arranged on the first substrate, and the second substrate includes a spacer supporting region. A surface of the spacer being in contact with the spacer supporting region is provided with a first clamping structure, and the spacer supporting region is provided with a second clamping structure fitted to the first clamping structure.