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公开(公告)号：US09318219B2
公开(公告)日：2016-04-19
申请号：US14365840
申请日：2013-06-21
CPC classification number: G11C19/28 , G09G3/3648 , G09G3/3677 , G09G2310/0286
Abstract: There are provided a shift register unit and a display device in embodiments of the present disclosure, for solving the problem that since two different transistors are used to respectively pull-up and pull-down a gate line connected to a conventional shift register unit, the conventional shift register unit occupies a large area, which causes a large consumption of materials when manufacturing the shift register unit, a high cost of the conventional shift register unit, and a high cost of a display device comprising the conventional shift register unit. The shift register unit comprises: a first capacitor, a first transistor, a pull-up module and a first pull-down module, wherein the first capacitor has a first electrode configured to receive a clock signal, a gate connected with one terminal of the first capacitor, the pull-up module and the first pull-down module, and a second electrode connected with the other terminal of the first capacitor. The first transistor in the shift register unit pull-up or pull-down the level at the gate line connected to the shift register unit.
Abstract translation: 在本公开的实施例中提供了移位寄存器单元和显示装置，为了解决由于使用两个不同的晶体管分别上拉和下拉连接到常规移位寄存器单元的栅极线的问题， 传统的移位寄存器单元占据大面积，这在制造移位寄存器单元时造成材料消耗大，传统移位寄存器单元成本高，并且包括常规移位寄存器单元的显示装置的高成本。 移位寄存器单元包括：第一电容器，第一晶体管，上拉模块和第一下拉模块，其中第一电容器具有被配置为接收时钟信号的第一电极，与第一电容器的一个端子连接的栅极 第一电容器，上拉模块和第一下拉模块，以及与第一电容器的另一端子连接的第二电极。 移位寄存器单元中的第一个晶体管将连接到移位寄存器单元的栅极线上的电平上拉或下拉。
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32.发明授权公开(公告)号：US12249524B2
公开(公告)日：2025-03-11
申请号：US17264902
申请日：2020-05-29
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yang Yue , Tong Yang , Shi Shu , Yong Yu , Haitao Huang , Xiang Li , Qi Yao , Xue Jiang , Guangcai Yuan
IPC: H01L21/67 , B65G47/90 , H01L25/075 , H01L33/62 , H10N30/00 , H10N30/074 , H10N30/20 , H10N39/00
Abstract: Provided in the embodiments are a transfer structure and a method thereof, and a transfer device and a manufacturing method thereof. The transfer structure includes: a first electrode, a piezoelectric layer, a second electrode and an adhesive layer stacked on a substrate in sequence, wherein the first electrode and the second electrode are insulated from each other. The transfer structure further includes: a position-limiting layer, wherein the position-limiting layer includes a cavity; the piezoelectric layer and at least part of the adhesive layer are located in the cavity of the position-limiting layer; and in the direction perpendicular to the substrate, the distance between the surface, away from the substrate, of the position-limiting layer and the substrate is greater than the distance between the surface, away from the substrate, of the adhesive layer and the substrate.
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公开(公告)号：US11501692B2
公开(公告)日：2022-11-15
申请号：US17206579
申请日：2021-03-19
Inventor： Xibin Shao , Zhangtao Wang , Rui Ma , Tong Yang
Abstract: The present application discloses a shift-register circuit including a shift-register unit and a shutdown-discharge sub-circuit. The shift-register unit is coupled to a clock port, a first reference voltage port, a second reference voltage port, and an output port and configured to set a voltage level at a pull-up node to control a clock signal from the clock port being outputted to the output port to drive a display panel during a display period. The shutdown discharge sub-circuit is configured to at least simultaneously receive at least one shutdown signal at a first voltage level from a shutdown-discharge control port and a second signal at the first voltage level from the second reference voltage port to start a shutdown period to discharge at least one of the pull-up node and the output port.
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34.发明授权公开(公告)号：US11367469B2
公开(公告)日：2022-06-21
申请号：US15766937
申请日：2017-10-09
Inventor： Xianrui Qian , Guolei Wang , Tong Yang , Suzhen Mu , Peng Chen , Yuting Chen , Zixuan Wang , Bo Li
Abstract: A shift register unit circuit includes an input sub-circuit, a pull-up sub-circuit, a pull-down control sub-circuit, a pull-down sub-circuit, and a voltage regulating sub-circuit. The input sub-circuit receives an input signal from a signal input terminal to control a potential of a pull-up node. The pull-up sub-circuit outputs a gate driving signal to an output terminal under control of the potential of the pull-up node and a signal from a first signal terminal. The pull-down control sub-circuit conducts a pull-down node with a first node under control of a signal from the second signal terminal. The pull-down sub-circuit conducts the pull-up node with the first node and the turn-down signal terminal with the output terminal under control of a potential of the pull-down node. The voltage regulating sub-circuit conducts the first node with the turn-down signal terminal under control of a potential of the first node.
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35.发明授权公开(公告)号：US11244643B2
公开(公告)日：2022-02-08
申请号：US16179671
申请日：2018-11-02
Inventor： Zixuan Wang , Peng Chen , Tong Yang , Xianrui Qian , Yuting Chen , Suzhen Mu , Zhou Rui , Xiong Xiong
Abstract: A shift register circuit includes a pull-up control sub-circuit, a pull-up sub-circuit and a shutdown auxiliary sub-circuit. The pull-up control sub-circuit is configured to transmit a voltage from the signal input terminal to the pull-up node under the control of the voltage from the signal input terminal. The shut-down auxiliary sub-circuit is configured to pull down a voltage of the pull-up node to a voltage of the discharge voltage terminal under the control of a voltage from the pull-up node. The pull-up sub-circuit is configured to transmit a voltage from the clock signal terminal to the first signal output terminal under the control of a voltage from the pull-up node. The first signal output terminal is configured to be connected to a gate line.
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Patent Agency Ranking
公开(公告)号：US11175541B2
公开(公告)日：2021-11-16
申请号：US17264826
申请日：2020-05-29
Applicant: BOE Technology Group Co., Ltd.
Inventor： Yang Yue , Hongrun Wang , Qi Yao , Tong Yang , Xiang Li , Yong Yu , Haitao Huang , Chuanxiang Xu , Feng Liao
IPC: G02F1/1339 , G02F1/1337
Abstract: A display substrate and a preparation method therefor, a display panel and a display device. The display substrate includes a plurality of pixel regions arranged in an array. The display substrate includes: a base; pixel electrodes provided on the base and located in the pixel regions; separation columns provided on the base and located between two adjacent pixel regions in the row direction, side surfaces of the separation columns having hydrophobic characteristics; and an alignment film provided on the pixel electrodes and located in the pixel regions, where edges of two opposite sides of the alignment film in the row direction are in contact with a side surface of the separation columns, and a surface of the alignment film on a side facing away from the base has a shape of gradually protruding from both sides toward the middle in the row direction.
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公开(公告)号：US20210247634A1
公开(公告)日：2021-08-12
申请号：US16767472
申请日：2019-11-29
Inventor： Yuting Chen , Tong Yang , Suzhen Mu
Abstract: A display substrate, a display device and a test method of the display substrate are disclosed. The display substrate includes a display region and a peripheral region. The peripheral region includes: a first leading wire extending in a first direction and including a first end and a second end; a first test wire electrically connected with the first leading wire at a first position of the first test wire between the first end and the second end; the display region includes first signal wires of first group extending in a second direction, two first signal wires arranged outermost in the first direction among the first signal wires of first group are respectively connected with the first end and the second end, and remaining first signal wires among the first signal wires of first group are connected with the first leading wire between the first end and the second end.
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公开(公告)号：US20210209996A1
公开(公告)日：2021-07-08
申请号：US17206579
申请日：2021-03-19
Inventor： Xibin Shao , Zhangtao Wang , Rui Ma , Tong Yang
Abstract: The present application discloses a shift-register circuit including a shift-register unit and a shutdown-discharge sub-circuit. The shift-register unit is coupled to a clock port, a first reference voltage port, a second reference voltage port, and an output port and configured to set a voltage level at a pull-up node to control a clock signal from the clock port being outputted to the output port to drive a display panel during a display period. The shutdown discharge sub-circuit is configured to at least simultaneously receive at least one shutdown signal at a first voltage level from a shutdown-discharge control port and a second signal at the first voltage level from the second reference voltage port to start a shutdown period to discharge at least one of the pull-up node and the output port.
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39.发明授权公开(公告)号：US10775925B2
公开(公告)日：2020-09-15
申请号：US16374744
申请日：2019-04-03
Inventor： Tong Yang
Abstract: A shift register unit and a method for driving the same, a gate driving circuit, and a touch display apparatus are disclosed. The shift register unit includes: an input circuit configured to output an input signal received at an input signal terminal to a pull-up node; an output circuit configured to output a gate driving signal at an output signal terminal under control of a clock signal; a reset circuit configured to reset the pull-up node to a first level under control of a reset signal; a pull-down control circuit configured to control a level at the output signal terminal using the first level at a first level terminal under control of a control signal and the level at the pull-up node; and a compensation circuit configured to compensate for the level at the pull-up node using a compensation signal under control of the level at the pull-up node.
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40.发明授权公开(公告)号：US10593284B2
公开(公告)日：2020-03-17
申请号：US14912635
申请日：2015-07-29
Inventor： Tong Yang , Rui Ma , Guolei Wang
Abstract: The present disclosure provides provide a shift register unit and a method for driving the shift register unit, a shift register circuit and a display apparatus. The shift register unit comprises: a charging module connected to an input terminal and a pull-up node and configured to generate a pull-up signal; a pull-up module connected to the pull-up node, a first clock signal terminal and an output terminal of the shift register unit, and configured to charge the output terminal of the shift register unit; a first pull-down control module connected to a second clock signal terminal, the pull-up node, a low voltage terminal and a pull-down control node, and configured to generate a pull-down control signal; a second pull-down control module connected to the pull-down control node, the pull-up node, the second clock signal terminal, the low voltage terminal and the pull-down node, and configured to generate a pull-down signal; a first pull-down module connected to a first reset terminal, the output terminal of the shift register unit and the low voltage terminal, and configured to discharge the output terminal of the shift register unit; a second pull-down module connected to a pull-down node, the second clock signal terminal, the output terminal of the shift register unit, the pull-up node and the low voltage terminal, and configured to discharge the output terminal of the shift register unit; and a reset module connected to a second reset terminal, the pull-up node and the low voltage terminal, and configured to reset the pull-up node.
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