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公开(公告)号：US07224359B1
公开(公告)日：2007-05-29
申请号：US10867988
申请日：2004-06-14
IPC分类号： G06T15/40
CPC分类号： G06T15/30
摘要： A system, method and computer program product are provided for depth clamping in a hardware graphics pipeline. Initially, a depth value is identified. It is then determined as to whether a hardware graphics pipeline is operating in a depth clamping mode. If the hardware graphics pipeline is operating in the depth clamping mode, the depth value is clamped within a predetermined range utilizing the hardware graphics pipeline.
摘要翻译： 提供了一种系统，方法和计算机程序产品，用于在硬件图形管道中进行深度钳位。 最初，确定深度值。 然后确定硬件图形管线是否以深度夹持模式操作。 如果硬件图形管线在深度夹持模式下运行，则使用硬件图形管线将深度值钳位在预定范围内。
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32.发明授权Software emulator for optimizing application-programmable vertex processing 有权用于优化应用程序可编程顶点处理的软件仿真器公开(公告)号：US07162716B2
公开(公告)日：2007-01-09
申请号：US09877851
申请日：2001-06-08
CPC分类号： G06T1/20
摘要： A central processing unit (CPU) including an operating system for executing code segments capable of performing graphics processing on the CPU. Associated therewith is a graphics application specific integrated circuit (ASIC) for performing graphics processing in accordance with a graphics processing standard. An extension to the software is included that identifies a first portion of the graphics processing to be performed on the graphics ASIC and a second portion of the graphics processing to be performed on the CPU. Such second portion of the graphics processing includes application-programmable vertex processing unavailable by the graphics ASIC. A compiler compiles the software to execute the first portion of the graphics processing on the graphics ASIC and the second portion of the graphics processing on the CPU in accordance with the extension.
摘要翻译： 一种中央处理单元（CPU），包括用于执行能够对CPU执行图形处理的代码段的操作系统。 相关联的是用于根据图形处理标准执行图形处理的图形专用集成电路（ASIC）。 包括对软件的扩展，其标识要在图形ASIC上执行的图形处理的第一部分以及要在CPU上执行的图形处理的第二部分。 图形处理的这种第二部分包括由图形ASIC不可用的应用可编程顶点处理。 编译器编译该软件以执行图形ASIC上的图形处理的第一部分，并根据扩展在CPU上执行图形处理的第二部分。
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33.发明授权System, method and computer program product for programmable fragment processing in a graphics pipeline 有权用于图形管线中可编程片段处理的系统，方法和计算机程序产品公开(公告)号：US06982718B2
公开(公告)日：2006-01-03
申请号：US10000996
申请日：2001-11-30
IPC分类号： G06T1/20
摘要： A system, method and computer program product are provided for programmable processing of fragment data in a computer hardware graphics pipeline. Initially, fragment data is received in a hardware graphics pipeline. It is then determined whether the hardware graphics pipeline is operating in a programmable mode. If it is determined that the hardware graphics pipeline is operating in the programmable mode, programmable operations are performed on the fragment data in order to generate output. The programmable operations are performed in a manner/sequence specified in a graphics application program interface. If it is determined that the hardware graphics pipeline is not operating in the programmable mode, standard graphics application program interface (API) operations are performed on the fragment data in order to generate output.
摘要翻译： 提供了一种系统，方法和计算机程序产品，用于在计算机硬件图形管线中对片段数据进行可编程处理。 最初，在硬件图形流水线中接收片段数据。 然后确定硬件图形管线是否以可编程模式操作。 如果确定硬件图形流水线在可编程模式下操作，则对片段数据执行可编程操作以产生输出。 可编程操作以图形应用程序接口中指定的方式/顺序执行。 如果确定硬件图形流水线未在可编程模式下运行，则对片段数据执行标准图形应用程序接口（API）操作，以便产生输出。
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34.发明授权System, method and article of manufacture for allowing direct memory access to graphics vertex data while bypassing a processor 有权用于允许在绕过处理器的同时直接存储器访问图形顶点数据的系统，方法和制造公开(公告)号：US06867780B1
公开(公告)日：2005-03-15
申请号：US09454518
申请日：1999-12-06
CPC分类号： G06T1/60 , G06T15/005 , G09G5/363 , G09G2360/12
摘要： A system, method, and article of manufacture are provided for allowing direct memory access to graphics vertex data by a graphics accelerator module. First, vertex data is stored in memory. Next, an index is received which is representative of a portion of the vertex data in the memory. A location is then determined in the memory in which the portion of the vertex data is stored. Such portion of the vertex data may thereafter be directly retrieved from the determined location in the memory while bypassing a processor.
摘要翻译： 提供了一种系统，方法和制品，用于允许通过图形加速器模块直接存储器访问图形顶点数据。 首先，顶点数据存储在内存中。 接下来，接收代表存储器中顶点数据的一部分的索引。 然后在其中存储顶点数据的部分的存储器中确定位置。 之后可以绕过处理器从存储器中确定的位置直接检索顶点数据的这一部分。
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35.发明授权System, method and computer program product for matrix tracking during vertex processing in a graphics pipeline 有权系统，方法和计算机程序产品，用于在图形管线顶点处理过程中的矩阵跟踪公开(公告)号：US06697064B1
公开(公告)日：2004-02-24
申请号：US09877348
申请日：2001-06-08
IPC分类号： G06T1530
摘要： A system, method and computer program product are provided for tracking a matrix during vertex processing. Initially, a request is received to track a matrix. Such matrix is identified in the request. The identified matrix is then tracked for vertex processing. In one aspect of the present embodiment, a version, type, and/or name of the matrix is identified in the request.
摘要翻译： 提供了一种用于在顶点处理期间跟踪矩阵的系统，方法和计算机程序产品。 最初，接收到跟踪矩阵的请求。 这种矩阵在请求中被识别。 然后跟踪识别的矩阵进行顶点处理。 在本实施例的一个方面，在请求中识别矩阵的版本，类型和/或名称。
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36.发明授权公开(公告)号：US09311738B2
公开(公告)日：2016-04-12
申请号：US13100938
申请日：2011-05-04
申请人： Mark J. Kilgard
发明人： Mark J. Kilgard
CPC分类号： G06T15/005 , G06T11/203
摘要： One embodiment of the present invention sets forth a technique for rendering paths by first generating a stencil buffer indicating pixels of the path that should be covered and then covering the path. The paths may be filled or stroked without tessellating the paths. Path rendering may be accelerated when a graphics processing unit or other processor that is configured to perform operations to generate the stencil buffer and cover the path to fill or stroke the path.
摘要翻译： 本发明的一个实施例提出了一种用于渲染路径的技术，首先产生一个模板缓冲器，该模板缓冲器指示应覆盖的路径的像素，然后覆盖该路径。 路径可以填充或抚摸，而无需细分路径。 当图形处理单元或其他处理器被配置为执行操作以生成模板缓冲器并覆盖路径以填充或冲程时，可以加速路径渲染。
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公开(公告)号：US08786606B2
公开(公告)日：2014-07-22
申请号：US13097993
申请日：2011-04-29
申请人： Mark J. Kilgard
发明人： Mark J. Kilgard
IPC分类号： G06T11/20
CPC分类号： G06T15/005 , G06T11/203
摘要： One embodiment of the present invention sets forth a technique for stroking rendered paths. Path rendering may be accelerated when a graphics processing unit or other processor is configured to identify pixels that are within half of the stroke width of any point along a path to be stroked. The path is represented by quadratic Bèzier segments and a cubic equation is evaluated to determine whether or not each point in a conservative hull that bounds the quadratic Bèzier segment is within the stroke width.
摘要翻译： 本发明的一个实施例提出了一种用于抚摸渲染路径的技术。 当图形处理单元或其他处理器被配置为识别沿着要抚摸的路径的任何点的行程宽度的一半内的像素时，可以加速路径渲染。 路径由二次Bèzier段表示，并且评估三次方程以确定界定二次Bèzier段的保守船体中的每个点是否在行程宽度内。
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38.发明授权公开(公告)号：US08782611B1
公开(公告)日：2014-07-15
申请号：US12546527
申请日：2009-08-24
申请人： Brian Kretzler , Mark J. Kilgard
发明人： Brian Kretzler , Mark J. Kilgard
IPC分类号： G06F9/44
CPC分类号： G06F11/3632
摘要： One embodiment of the invention sets forth a mechanism for debugging PPU code executing on a PPU where many thread groups simultaneously execute the same instruction on different slices of input data. A debugger engine receives breakpoint information associated with a breakpoint set on a specific instruction within PPU code. The debugger engine then injects a debugging routine into compiled PPU code. A driver notifies the debugger engine when the specific instruction within the PPU code is executed. The debugger engine then retrieves thread state information associated with each thread group in a set of thread groups being inspected from the PPU via the PPU driver. Among other things, thread state information includes the execution state of each thread in each thread group and values of variables included in the PPU code. The thread state information is then transmitted to the debugger user interface for display to a software developer.
摘要翻译： 本发明的一个实施例提出了一种用于调试在PPU上执行的PPU代码的机制，其中许多线程组在不同的输入数据片段上同时执行相同的指令。 调试器引擎接收与在PPU代码内的特定指令上设置的断点相关联的断点信息。 然后，调试器引擎将调试例程注入到编译的PPU代码中。 当执行PPU代码中的特定指令时，驱动程序通知调试器引擎。 然后调试器引擎通过PPU驱动程序从PPU检索一组正在检查的线程组中的每个线程组的线程状态信息。 其中，线程状态信息包括每个线程组中的每个线程的执行状态以及包含在PPU代码中的变量的值。 然后将线程状态信息发送到调试器用户界面以显示给软件开发者。
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39.发明授权公开(公告)号：US08730253B2
公开(公告)日：2014-05-20
申请号：US13097483
申请日：2011-04-29
申请人： Mark J. Kilgard
发明人： Mark J. Kilgard
IPC分类号： G09G5/00
CPC分类号： G06T15/005 , G06T11/203
摘要： One embodiment of the present invention sets forth a technique for decomposing and filling cubic Bèzier segments of paths without tessellating the paths. Path rendering may be accelerated when a GPU or other processor is configured to perform the decomposition operations. Cubic Bèzier paths are classified and decomposed into simple cubic Bèzier path segments based on the classification. A stencil buffer is then generated that indicates pixels that are inside of the decomposed cubic Bèzier segments. The paths are then filled according to the stencil buffer to produce a filled path.
摘要翻译： 本发明的一个实施例提出了一种用于分解和填充路径的立方Bèzier段的技术，而不使路径细分。 当GPU或其他处理器被配置为执行分解操作时，可以加速路径渲染。 基于分类，立方Bèzier路径被分类并分解为简单的立方Bèzier路径段。 然后生成一个模板缓冲区，指示分解的立方Bèzier段内部的像素。 然后根据模板缓冲器填充路径以产生填充路径。
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公开(公告)号：US08648856B2
公开(公告)日：2014-02-11
申请号：US12004540
申请日：2007-12-20
CPC分类号： G06T15/04 , G06T15/60 , G06T2215/12
摘要： An invention is provided for rendering using an omnidirectional light. A shadow cube texture map having six cube faces centered by a light source is generated. Each cube face comprises a shadow texture having depth data from a perspective of the light source. In addition, each cube face is associated with an axis of a three-dimensional coordinate system. For each object fragment rendered from the camera's perspective a light-to-surface vector is defined from the light source to the object fragment, and particular texels within particular cube faces are selected based on the light-to-surface vector. The texel values are tested against a depth value computed from the light to surface vector. The object fragment is textured as in light or shadow according to the outcome of the test.
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