-
1.发明授权System, method and computer program product for matrix tracking during vertex processing in a graphics pipeline 有权系统，方法和计算机程序产品，用于在图形管线顶点处理过程中的矩阵跟踪公开(公告)号：US06697064B1
公开(公告)日：2004-02-24
申请号：US09877348
申请日：2001-06-08
IPC分类号： G06T1530
摘要： A system, method and computer program product are provided for tracking a matrix during vertex processing. Initially, a request is received to track a matrix. Such matrix is identified in the request. The identified matrix is then tracked for vertex processing. In one aspect of the present embodiment, a version, type, and/or name of the matrix is identified in the request.
摘要翻译： 提供了一种用于在顶点处理期间跟踪矩阵的系统，方法和计算机程序产品。 最初，接收到跟踪矩阵的请求。 这种矩阵在请求中被识别。 然后跟踪识别的矩阵进行顶点处理。 在本实施例的一个方面，在请求中识别矩阵的版本，类型和/或名称。
-
2.发明授权System, method and computer program product for vertex attribute aliasing in a graphics pipeline 有权图形管道中顶点属性别名的系统，方法和计算机程序产品公开(公告)号：US06894687B1
公开(公告)日：2005-05-17
申请号：US09877852
申请日：2001-06-08
摘要： A system, method and article of manufacture are provided for aliasing vertex attributes during vertex processing. Initially, a plurality of identifiers are each mapped to one of a plurality of parameters associated with vertex data. Thereafter, the vertex data is processed by calling the parameters utilizing a vertex program capable of referencing the parameters using the identifiers.
摘要翻译： 提供了一种系统，方法和制造工具，用于在顶点处理期间混叠顶点属性。 最初，多个标识符被映射到与顶点数据相关联的多个参数中的一个。 此后，通过使用能够使用标识符引用参数的顶点程序调用参数来处理顶点数据。
-
3.发明授权Software emulator for optimizing application-programmable vertex processing 有权用于优化应用程序可编程顶点处理的软件仿真器公开(公告)号：US07162716B2
公开(公告)日：2007-01-09
申请号：US09877851
申请日：2001-06-08
CPC分类号： G06T1/20
摘要： A central processing unit (CPU) including an operating system for executing code segments capable of performing graphics processing on the CPU. Associated therewith is a graphics application specific integrated circuit (ASIC) for performing graphics processing in accordance with a graphics processing standard. An extension to the software is included that identifies a first portion of the graphics processing to be performed on the graphics ASIC and a second portion of the graphics processing to be performed on the CPU. Such second portion of the graphics processing includes application-programmable vertex processing unavailable by the graphics ASIC. A compiler compiles the software to execute the first portion of the graphics processing on the graphics ASIC and the second portion of the graphics processing on the CPU in accordance with the extension.
摘要翻译： 一种中央处理单元（CPU），包括用于执行能够对CPU执行图形处理的代码段的操作系统。 相关联的是用于根据图形处理标准执行图形处理的图形专用集成电路（ASIC）。 包括对软件的扩展，其标识要在图形ASIC上执行的图形处理的第一部分以及要在CPU上执行的图形处理的第二部分。 图形处理的这种第二部分包括由图形ASIC不可用的应用可编程顶点处理。 编译器编译该软件以执行图形ASIC上的图形处理的第一部分，并根据扩展在CPU上执行图形处理的第二部分。
-
公开(公告)号：US07006101B1
公开(公告)日：2006-02-28
申请号：US10180798
申请日：2002-06-25
IPC分类号： G09G5/37
CPC分类号： G06F9/321 , G06F9/30058 , G06F9/30072 , G06F9/30094
摘要： A system, method and computer program product are provided for branching during programmable processing utilizing a graphics application program interface in conjunction with a hardware graphics pipeline. Initially, a first instruction defined by the graphics application program interface is identified. A first operation is performed on graphics data based on the first instruction utilizing the hardware graphics pipeline. Any some point, the present technique may involve branching to an additional instruction defined by the graphics application program interface other than a subsequent sequential instruction. Next, another operation is performed on the graphics data based on the additional instruction utilizing the hardware graphics pipeline.
摘要翻译： 提供了一种系统，方法和计算机程序产品，用于在可编程处理期间利用结合硬件图形管线的图形应用程序接口进行分支。 首先，识别由图形应用程序接口定义的第一指令。 基于使用硬件图形管线的第一指令对图形数据执行第一操作。 任何一点，本技术可能涉及分支到由图形应用程序接口定义的附加指令，而不是随后的顺序指令。 接下来，基于利用硬件图形管线的附加指令对图形数据执行另一操作。
-
5.发明授权Primitive program compilation for flat attributes with provoking vertex independence 有权平面属性的原始程序编译，引起顶点独立性公开(公告)号：US08171461B1
公开(公告)日：2012-05-01
申请号：US11361769
申请日：2006-02-24
CPC分类号： G06F8/4441
摘要： Systems and methods for compiling high-level primitive programs are used to generate primitive program micro-code for execution by a primitive processor. A compiler is configured to produce micro-code for a specific target primitive processor based on the target primitive processor's capabilities. The compiler supports features of the high-level primitive program by providing conversions for different applications programming interface conventions, determining output primitive types, initializing attribute arrays based on primitive input profile modifiers, and determining vertex set lengths from specified primitive input types.
摘要翻译： 用于编译高级原始程序的系统和方法用于生成原始程序微代码，以由原始处理器执行。 编译器被配置为基于目标原语处理器的能力为特定目标原语处理器产生微代码。 编译器通过为不同的应用程序编程接口约定提供转换，确定输出原语类型，基于原始输入配置文件修饰符初始化属性数组以及从指定的基元输入类型确定顶点集长度来支持高级原始程序的功能。
-
6.发明授权System and method for compiling high-level primitive programs into primitive program micro-code 有权将高级原始程序编译成原始程序微代码的系统和方法公开(公告)号：US08006236B1
公开(公告)日：2011-08-23
申请号：US11361597
申请日：2006-02-24
IPC分类号： G06F9/45
CPC分类号： G06F8/443
摘要： Systems and methods for compiling high-level primitive programs are used to generate primitive program micro-code for execution by a primitive processor. A compiler is configured to produce micro-code for a specific target primitive processor based on the target primitive processor's capabilities. The compiler supports features of the high-level primitive program by providing conversions for different applications programming interface conventions, determining output primitive types, initializing attribute arrays based on primitive input profile modifiers, and determining vertex set lengths from specified primitive input types.
摘要翻译： 用于编译高级原始程序的系统和方法用于生成原始程序微代码，以由原始处理器执行。 编译器被配置为基于目标原语处理器的能力为特定目标原语处理器产生微代码。 编译器通过为不同的应用程序编程接口约定提供转换，确定输出原语类型，基于原始输入配置文件修饰符初始化属性数组，以及从指定的基元输入类型确定顶点集长度来支持高级原始程序的功能。
-
公开(公告)号：US07825933B1
公开(公告)日：2010-11-02
申请号：US11361789
申请日：2006-02-24
IPC分类号： G06T15/00
CPC分类号： G06T15/005 , G06F8/447
摘要： Systems and methods for compiling high-level primitive programs are used to generate primitive program micro-code for execution by a primitive processor. A compiler is configured to produce micro-code for a specific target primitive processor based on the target primitive processor's capabilities. The compiler supports features of the high-level primitive program by providing conversions for different applications programming interface conventions, determining output primitive types, initializing attribute arrays based on primitive input profile modifiers, and determining vertex set lengths from specified primitive input types.
摘要翻译： 用于编译高级原始程序的系统和方法用于生成原始程序微代码，以由原始处理器执行。 编译器被配置为基于目标原语处理器的能力为特定目标原语处理器产生微代码。 编译器通过为不同的应用程序编程接口约定提供转换，确定输出原语类型，基于原始输入配置文件修饰符初始化属性数组，以及从指定的基元输入类型确定顶点集长度来支持高级原始程序的功能。
-
8.发明授权System and method for converting a vertex program to a binary format capable of being executed by a hardware graphics pipeline 有权用于将顶点程序转换为能够由硬件图形管线执行的二进制格式的系统和方法公开(公告)号：US07719545B1
公开(公告)日：2010-05-18
申请号：US11942596
申请日：2007-11-19
CPC分类号： G06T15/005
摘要： A system, method and computer program product are provided for programmable vertex processing. Initially, a vertex program is identified including branch labels and instruction sequences with branch commands. The vertex program is then converted to a binary format capable of being executed by a hardware graphics pipeline. The vertex program may then be executed in the binary format utilizing the hardware graphics pipeline for transforming vertices. As an option, the vertex program is initially written in a textual format capable of being read by a human prior to being converted.
摘要翻译： 提供了可编程顶点处理的系统，方法和计算机程序产品。 最初，顶点程序被识别，包括分支标签和具有分支命令的指令序列。 然后，顶点程序被转换成能够由硬件图形管线执行的二进制格式。 然后可以利用用于变换顶点的硬件图形管线以二进制格式执行顶点程序。 作为选择，顶点程序最初被写入能够被转换之前被人读取的文本格式。
-
9.发明授权System and method for converting a vertex program to a binary format capable of being executed by a hardware graphics pipeline 有权用于将顶点程序转换为能够由硬件图形管线执行的二进制格式的系统和方法公开(公告)号：US07456838B1
公开(公告)日：2008-11-25
申请号：US11062060
申请日：2005-02-18
CPC分类号： G06T15/005
摘要： A system, method and computer program product are provided for programmable vertex processing. Initially, a vertex program is identified including branch labels and instruction sequences with branch commands. The vertex program is then converted to a binary format capable of being executed by a hardware graphics pipeline. The vertex program may then be executed in the binary format utilizing the hardware graphics pipeline for transforming vertices. As an option, the vertex program is initially written in a textual format capable of being read by a human prior to being converted.
摘要翻译： 提供了可编程顶点处理的系统，方法和计算机程序产品。 最初，顶点程序被识别，包括分支标签和具有分支命令的指令序列。 然后，顶点程序被转换成能够由硬件图形管线执行的二进制格式。 然后可以利用用于变换顶点的硬件图形管线以二进制格式执行顶点程序。 作为选择，顶点程序最初被写入能够被转换之前被人读取的文本格式。
-
公开(公告)号：US07268785B1
公开(公告)日：2007-09-11
申请号：US10327307
申请日：2002-12-19
IPC分类号： G06T1/20 , G06F15/167
CPC分类号： G06T1/20 , G06T15/005
摘要： A system and method for interfacing graphics program modules written to execute on a plurality of functional units of a graphics processor using a shared memory. A central processing unit (CPU) receives a first graphics program module that outputs a first parameter referenced by a first graphics program module identifier, a second graphics program module that inputs the first parameter by referencing the first graphics program module identifier, and a first data structure that includes, in a pre-defined order, a list of first data structure identifiers. The CPU identifies a memory location in the shared memory, based on the pre-defined order of the first data structure identifiers, for one of the first data structure identifiers that is the same as the first graphics program module identifier. The CPU modifies the first and second graphics program modules to reference the first parameter by the identified memory location in the shared memory.
摘要翻译： 一种用于使用共享存储器来连接图形程序模块的系统和方法，该图形程序模块被写入到在图形处理器的多个功能单元上执行。 中央处理单元（CPU）接收输出由第一图形程序模块标识符引用的第一参数的第一图形程序模块，通过参考第一图形程序模块标识符来输入第一参数的第二图形程序模块和第一数据 结构以预定义的顺序包括第一数据结构标识符的列表。 基于与第一图形程序模块标识符相同的第一数据结构标识符之一，CPU基于第一数据结构标识符的预定义顺序来识别共享存储器中的存储器位置。 CPU修改第一和第二图形程序模块，以通过共享存储器中标识的存储器位置引用第一参数。
-
-
-
-
-
-
-
-
-
搜索结果
61 条记录 (耗时 0.049 秒)
