公开(公告)号：US20100008345A1

公开(公告)日：2010-01-14

申请号：US12563555

申请日：2009-09-21

申请人： Gerald Lebizay

发明人： Gerald Lebizay

IPC分类号： H04W40/00 ,  H04L12/66

CPC分类号： H04L65/1043 ,  G06Q20/102 ,  H04L29/06027 ,  H04L65/103 ,  H04L65/104 ,  H04L65/607

摘要： A method and apparatus that receives an IP packet and encapsulates the packet with an IP header. Further, time-domain multiplexed voice data is received and converted into VoIP packets. Still further, Signaling System 7 (SS7) compliant signals are decoded. The decoded SS7 signals are received and encapsulated prior to transmission to a telephony device.

摘要翻译： 一种接收IP分组并用IP报头封装分组的方法和装置。 此外，时域复用语音数据被接收并转换成VoIP分组。 此外，信令系统7（SS7）兼容信号被解码。 解码的SS7信号在传输到电话设备之前被接收和封装。

公开(公告)号：US07573876B2

公开(公告)日：2009-08-11

申请号：US10313783

申请日：2002-12-05

申请人： Gerald Lebizay ,  David W Gish ,  Neal C Oliver

发明人： Gerald Lebizay ,  David W Gish ,  Neal C Oliver

IPC分类号： H04L12/28 ,  H04J3/16

CPC分类号： H04L69/08 ,  H04L29/06

摘要： A method and apparatus to perform protocol translation for a modular system may be described wherein a first packet created in accordance with a first protocol is received, a packet type for the first packet is determined, a second protocol based on the packet type is selected and the first packet is translated to a second packet in accordance with the second protocol. Other embodiments are described and claimed.

摘要翻译： 可以描述对于模块化系统执行协议转换的方法和装置，其中接收到根据第一协议创建的第一分组，确定第一分组的分组类型，基于分组类型的第二协议被选择， 根据第二协议将第一分组转换为第二分组。 描述和要求保护其他实施例。

公开(公告)号：US07453870B2

公开(公告)日：2008-11-18

申请号：US10171447

申请日：2002-06-12

申请人： Kuriappan P. Alappat ,  Brian Peebles ,  Aniruddha Kundu ,  Gerald Lebizay

发明人： Kuriappan P. Alappat ,  Brian Peebles ,  Aniruddha Kundu ,  Gerald Lebizay

IPC分类号： H04L12/50 ,  H04Q11/00

CPC分类号： H04L49/40 ,  H04L49/10 ,  H04L49/405

摘要： A backplane employed in a switch fabric, having the capability to allow signal communication between at least two modules. Two or more of the modules being adapted to employ different topologies from the following types of topologies: star, dual star, mesh, and cascaded mesh.

摘要翻译： 在交换结构中采用的背板，具有允许至少两个模块之间的信号通信的能力。 两个或更多个模块适于采用与以下类型拓扑结构不同的拓扑：星形，双星型，网状和级联网格。

公开(公告)号：US4845704A

公开(公告)日：1989-07-04

申请号：US33437

申请日：1987-04-01

申请人： Christos J. Georgiou ,  Gerald Lebizay

发明人： Christos J. Georgiou ,  Gerald Lebizay

IPC分类号： H04L12/56 ,  H04Q11/04

CPC分类号： H04Q11/04

摘要： A method of integrating the switching of voice and data between terminals connected to switch adapters. The switching of voice (or more generally synchronous signals) is accomplished by grouping voice samples in a first adapter and bound for the same destination or second adapter into a frame. Connections are then established between the two adapters and the frame is transmitted therethrough. A duplex method can also be set up by transmitting in both directions at the same time once a dual connection between the first and second adapter is established. Hence, a second group of voice samples bound for the first adapter is also formed ina frame. The two frames are then transmitted simultaneously in opposite directions through a dual connection in the switching matrix. Data is switched by storing data in respective memories of respective adapters, wherein each respective memory corresponds to a particular adapter to which the data stored therein is to be sent.

公开(公告)号：US4833670A

公开(公告)日：1989-05-23

申请号：US896771

申请日：1986-08-15

申请人： Gerald Lebizay ,  Yeong-Chang Lien ,  Kioshi Maruyama ,  Stanley E. Schuster

发明人： Gerald Lebizay ,  Yeong-Chang Lien ,  Kioshi Maruyama ,  Stanley E. Schuster

IPC分类号： H04Q11/04

CPC分类号： H04Q11/04

摘要： A method and apparatus to provide high speed voice/data switching with efficient utilization of available bandwidth and minimal switching delay. More specifically, this invention uses shift registers at each crosspoint of a switching matrix. In each slot position of the register, there is a bit representing the status of an associated crosspoint during a particular time slot. Each slot position of the register represents a different time slot. The status of the crosspoint changes in accordance with the bit that is in a designated slot position during each time slot. During each time slot, at most one bit of data/voice is then transmitted through any given closed crosspoint.

摘要翻译： 一种提供高速语音/数据交换的方法和装置，可有效利用可用带宽和最小的切换延迟。 更具体地，本发明在切换矩阵的每个交叉点使用移位寄存器。 在寄存器的每个时隙位置中，存在表示在特定时隙期间相关联的交叉点的状态的位。 寄存器的每个时隙位置表示不同的时隙。 交叉点的状态根据在每个时隙期间的指定时隙位置中的位而改变。 在每个时隙期间，通过任何给定的封闭交叉点传送最多一位数据/语音。

公开(公告)号：US4581732A

公开(公告)日：1986-04-08

申请号：US563493

申请日：1983-12-20

申请人： Marc Boisseau ,  Jean C. Borie ,  Alain Croisier ,  Michel Demange ,  Gerald Lebizay ,  Jean-Pierre P. Rossi

发明人： Marc Boisseau ,  Jean C. Borie ,  Alain Croisier ,  Michel Demange ,  Gerald Lebizay ,  Jean-Pierre P. Rossi

IPC分类号： H04Q11/04 ,  H04Q11/06 ,  H04J3/00

CPC分类号： H04Q11/06

摘要： A switching network for selectively connecting at least one input time-division channel on an input link (IL) to at least one output time-division channel on an output link (OL). The network is organized around a closed-loop link (10) on which circulates a multiplex message carrying 512 time-division exchange channels. The input and output links (LE and LS) are respectively multiplexed onto an input multiplex link (IML) and an output multiplex link (OML) which are coupled to the closed loop (10) by a switching module (SM). Each switching module comprises an input buffer (IB), an output buffer (OB) and a local buffer (LB) the addressing of which is selectively controlled by a time slot counter (CRT) or a corresponding pointer memory. So-called "broadcast" connections coupling one input channel to several output channels, and "in-cast" connections coupling several input channels to one output channel, can be established. Each of these connections uses only one exchange channel.

摘要翻译： 一种交换网络，用于将输入链路（IL）上的至少一个输入时分信道选择性地连接到输出链路（OL）上的至少一个输出时分信道。 网络围绕闭环链路（10）组织，在其上循环携带512个时分交换信道的多路复用消息。 输入和输出链路（LE和LS）分别复用到由交换模块（SM）耦合到闭环（10）的输入多路复用链路（IML）和输出多路复用链路（OML）上。 每个切换模块包括输入缓冲器（IB），输出缓冲器（OB）和本地缓冲器（LB），其寻址由时隙计数器（CRT）或对应的指针存储器选择性地控制。 所谓的“广播”连接将一个输入通道耦合到多个输出通道，并且可以建立将多个输入通道耦合到一个输出通道的“插入”连接。 这些连接中的每一个只使用一个交换通道。

公开(公告)号：US4539678A

公开(公告)日：1985-09-03

申请号：US563494

申请日：1983-12-20

申请人： Modeste Ambroise ,  Michel Demange ,  Gerald Lebizay ,  Jean-Marie Munier ,  Michel H. P. Peyronnenc

发明人： Modeste Ambroise ,  Michel Demange ,  Gerald Lebizay ,  Jean-Marie Munier ,  Michel H. P. Peyronnenc

IPC分类号： H04L5/22 ,  H04J3/06 ,  H04L12/42 ,  H04Q11/04 ,  H04J3/00

CPC分类号： H04J3/0629 ,  H04J3/0626 ,  H04L12/422 ,  H04Q11/04

摘要： The contents of input time-division channels on a closed-loop link (10LO, 10HI) are stored in a memory (173) at the address supplied by an input address counter (IAC) controlled by an incoming timing signal (2MCR). The memory is read out under control of an output address counter (OAC) controlled by an outgoing timing signal (2MCT). Each time interval is divided into one read period and two write periods. Means (186) are provided to select one of the two write periods dependent on the phase relationship between the incoming and outgoing timing signals. The units connected in series by means of the closed-loop link receive a timing signal circulating on a timing loop (15) that is closed by a master timing device (13). Slave timing devices (18) inserted in the timing loop regenerate the timing signals circulating thereon and check same.

摘要翻译： 在由输入定时信号（2MCR）控制的输入地址计数器（IAC）提供的地址处，存储器（173）中将闭环链路（10LO，10HI）上的输入时分信道的内容存储在存储器（173）中。 在由输出定时信号（2MCT）控制的输出地址计数器（OAC）的控制下读出存储器。 每个时间间隔分为一个读周期和两个写周期。 提供装置（186）以根据输入和输出定时信号之间的相位关系选择两个写入周期中的一个。 通过闭环链路串联连接的单元接收在由主定时装置（13）关闭的定时回路（15）上循环的定时信号。 插入定时环路的从动定时装置（18）重新产生在其上循环的定时信号并进行检查。

公开(公告)号：US07593390B2

公开(公告)日：2009-09-22

申请号：US11027915

申请日：2004-12-30

申请人： Gerald Lebizay

发明人： Gerald Lebizay

IPC分类号： H04L12/66

CPC分类号： H04L65/1043 ,  G06Q20/102 ,  H04L29/06027 ,  H04L65/103 ,  H04L65/104 ,  H04L65/607

摘要： A method and apparatus that receives an IP packet and encapsulates the packet with an IP header. Further, time-domain multiplexed voice data is received and converted into VoIP packets. Still further, Signaling System 7 (SS7) compliant signals are decoded. The decoded SS7 signals are received and encapsulated prior to transmission to a telephony device.

摘要翻译： 一种接收IP分组并用IP报头封装分组的方法和装置。 此外，时域复用语音数据被接收并转换成VoIP分组。 此外，信令系统7（SS7）兼容信号被解码。 解码的SS7信号在传输到电话设备之前被接收和封装。

公开(公告)号：US07289525B2

公开(公告)日：2007-10-30

申请号：US10080329

申请日：2002-02-21

申请人： Gerald Lebizay ,  David W Gish ,  Henry M Mitchel

发明人： Gerald Lebizay ,  David W Gish ,  Henry M Mitchel

IPC分类号： H04L12/28 ,  H04L12/56

CPC分类号： H04L49/358 ,  H04L12/44 ,  H04L45/00 ,  H04L45/22 ,  H04L45/28 ,  H04L47/10 ,  H04L47/2416 ,  H04L47/2441 ,  H04L47/50 ,  H04L47/6215 ,  H04L49/254 ,  H04L49/30

摘要： A method for inverse multiplexing of managed traffic flows over a multi-star switch network includes a source node classifier. The source node classifier, using a traffic-engineering algorithm, classifies incoming traffic based on flow parameters, embeds the flow parameters in a routing table in a node for a flow, places packets from classified flows into Switch-Specific Managed-Traffic Queues (SSMT) and a source node unmanaged traffic queue. A source node switch input scheduler process for a switch selects all managed packets from the SSMT destined for the switch, then selects a single unmanaged packet from the source node unmanaged traffic queue. The source node transmits the packets as classified flows through a switch fabric to the destination node. At the destination node packets transmitted through the switch fabric are sorted by a Switch Output Process and sent to intended output queues.

摘要翻译： 通过多星交换机网络对被管理业务流进行逆多路复用的方法包括源节点分类器。 源节点分类器使用流量工程算法，根据流参数对入局流量进行分类，将流参数嵌入流中的路由表中，将分组流中的数据包置入特定于交换机的管理流量队列（SSMT ）和源节点不受管理的流量队列。 用于交换机的源节点交换机输入调度器进程选择目的地为交换机的SSMT的所有被管理的分组，然后从源节点非管理业务队列中选择单个非托管分组。 源节点通过交换结构将分组流作为分类流发送到目的节点。 在目的地节点通过交换机结构传输的数据包通过交换机输出过程进行排序，并发送到预期的输出队列。

公开(公告)号：US07218640B2

公开(公告)日：2007-05-15

申请号：US10231832

申请日：2002-08-30

申请人： Gerald Lebizay ,  Brian E. Peebles ,  David W. Gish ,  Don V. Massa ,  Jay L. Gerbehy

发明人： Gerald Lebizay ,  Brian E. Peebles ,  David W. Gish ,  Don V. Massa ,  Jay L. Gerbehy

IPC分类号： H04L12/56

CPC分类号： H05K7/1459 ,  H04L47/12 ,  H04L47/20 ,  H04L47/2408 ,  H04L47/2416 ,  H04L47/2441 ,  H04L47/32 ,  H04L47/34 ,  H04L49/10 ,  H04L49/358 ,  H04L49/40

摘要： Multiple boards are connected within a chassis, using a multi-port Target Channel Adapter (TCA). Data is transported from a TCA on a board directly to a TCA on another board through a meshed backplane. The meshed backplane is equipped to mount boards via connectors and may consist of a fabric of copper conductors or optical fibers. Communication from TCA to TCA requires placing ports on each individual TCA along with the appropriate input and output buffering. A multi-port TCA capable of performing multiple bridging functions simultaneously i.e., bridging from a high speed serial meshed backplane to multiple local busses, i.e., Gigabit Ethernet, Fibre Channel, and TCP/IP devices, is referred to as a Fabric Interconnect Chip (FIC).

摘要翻译： 使用多端口目标通道适配器（TCA）在机箱内连接多个板卡。 数据通过网格背板从板上的TCA直接传输到另一块板上的TCA。 网状背板配备通过连接器安装板，可以由铜导体或光纤组成。 从TCA到TCA的通信需要在每个单独的TCA上配置端口以及适当的输入和输出缓冲。 能够同时执行多个桥接功能的多端口TCA，即从高速串行网格背板到多个本地总线，即千兆以太网，光纤通道和TCP / IP设备的桥接，被称为布线互连芯片 FIC）。