-
31.发明授权公开(公告)号：US08542031B2
公开(公告)日：2013-09-24
申请号：US13304759
申请日：2011-11-28
IPC分类号： H03K17/16 , H03K19/003
CPC分类号： H02J1/00
摘要： Disclosed is a circuit for adjusting a voltage supplied to an IC by a power supply circuit that produces a regulated-output voltage based on an output-control signal generated by a resistive voltage divider. The circuit includes a PVT detector configured to generate an interface control signal and an interface circuit (i) connected to PVT detector and to the resistive voltage divider and (ii) configured to adjust its resistance in response to the interface control signal. Adjusting the resistance of the interface circuit causes the voltage of the output-control signal to be adjusted, thus causing the power supply circuit to adjust the regulated output voltage.
摘要翻译： 公开了一种用于通过电源电路来调节提供给IC的电压的电路，该电源电路基于由电阻分压器产生的输出控制信号产生调节输出电压。 电路包括配置成产生接口控制信号的PVT检测器和连接到PVT检测器和电阻分压器的接口电路（i），以及（ii）被配置为响应于接口控制信号调整其电阻。 调整接口电路的电阻可以调节输出控制信号的电压，从而使电源电路调整稳压输出电压。
-
32.发明授权Method and apparatus for increased communication channel pre-emphasis for clock-like data patterns 有权用于增加用于时钟状数据模式的通信信道预加重的方法和装置公开(公告)号：US07869540B2
公开(公告)日：2011-01-11
申请号：US11506536
申请日：2006-08-18
CPC分类号： H04L25/03343 , H04L25/0286 , H04L25/03885
摘要： Methods and apparatus are disclosed for increased pre-emphasis for clock-like data patterns to compensate for channel distortions. One aspect of the invention compensates for channel distortions by evaluating a data pattern to be transmitted; determining if the data pattern satisfies one or more predefined criteria defining a clock-like data pattern; and generating a pre-emphasis level for the clock-like data patterns that is higher than a pre-emphasis level for the data patterns that do not satisfy the one or more predefined criteria. For example, a predefined window size can be defined for determining if the data pattern satisfies the one or more predefined criteria defining the clock-like data pattern. In one exemplary implementation, the higher pre-emphasis level is generated for one or more predefined data patterns. A table can optionally be accessed to determine the pre-emphasis level based on the data pattern.
摘要翻译： 公开了用于增加对时钟状数据模式的预加重以补偿信道失真的方法和装置。 本发明的一个方面通过评估要发送的数据模式来补偿信道失真; 确定数据模式是否满足定义时钟状数据模式的一个或多个预定标准; 以及对于不满足一个或多个预定标准的数据模式的高于预加重级别的时钟状数据模式，生成预加重级别。 例如，可以定义预定窗口大小以确定数据模式是否满足定义时钟状数据模式的一个或多个预定标准。 在一个示例性实现中，为一个或多个预定义的数据模式生成较高的预加重级别。 可以可选地访问表以基于数据模式确定预加重级别。
-
33.发明申请公开(公告)号：US20100244937A1
公开(公告)日：2010-09-30
申请号：US12160373
申请日：2007-10-31
IPC分类号： G05F1/10
CPC分类号： H03K19/00369
摘要： A compensation circuit for reducing power consumption in at least one digital circuit includes a first sample circuit connected to a first supply voltage, a second sample circuit connected to a second supply voltage, and a controller connected to the first and second sample circuits. The first and second sample circuits are substantially functionally equivalent to one another but optimized for different regions of operation within a specified range of PVT conditions. The controller is operative to receive respective output signals from the first and second sample circuits, to monitor a functionality of the second sample circuit relative to the first sample circuit, and to adjust a level of the second supply voltage to ensure correct operation of the second sample circuit throughout the specified range of PVT conditions. The digital circuit is operative from the second supply voltage.
摘要翻译： 用于降低至少一个数字电路中的功耗的补偿电路包括连接到第一电源电压的第一采样电路，连接到第二电源电压的第二采样电路和连接到第一和第二采样电路的控制器。 第一和第二采样电路基本上在功能上彼此相等，但是在PVT条件的指定范围内针对不同操作区域进行了优化。 控制器可操作以从第一和第二采样电路接收相应的输出信号，以监测第二采样电路相对于第一采样电路的功能，并调整第二电源电压的电平，以确保第二采样电路的正常工作 采样电路在指定的PVT条件范围内。 数字电路从第二电源电压工作。
-
34.发明授权Method and apparatus for adjusting receiver gain based on received signal envelope detection 失效基于接收信号包络检测来调整接收机增益的方法和装置公开(公告)号：US07738605B2
公开(公告)日：2010-06-15
申请号：US11318953
申请日：2005-12-23
IPC分类号： H04L27/08
CPC分类号： H04L25/063 , H03G3/30 , H03G3/3036 , H03G3/3052
摘要： Methods and apparatus are provided for adjusting receiver gain based on received signal envelope detection. The gain of a received signal is adjusted by obtaining a plurality of samples of the received signal for a given unit interval; determining an amplitude of the received signal based on the samples; and adjusting a receiver gain based on the determined amplitude. The received signal can be sampled, for example, using a plurality of latches. The value of the received signal can then be estimated by evaluating one or more of the latch values. Once the amplitude of the received signal is determined, one or more latches can be positioned at a desired target amplitude and the receiver gain can be adjusted until the amplitude of the received signal is within a desired tolerance of the specified target value.
摘要翻译： 提供了基于接收信号包络检测来调整接收机增益的方法和装置。 通过获得给定单位间隔的接收信号的多个样本来调整接收信号的增益; 基于样本确定接收信号的幅度; 以及基于所确定的幅度来调整接收机增益。 可以例如使用多个锁存器对接收到的信号进行采样。 然后可以通过评估一个或多个锁存值来估计接收信号的值。 一旦确定了接收信号的幅度，就可以将一个或多个锁存器定位在期望的目标幅度，并且可以调整接收器增益，直到接收到的信号的振幅在指定的目标值的期望公差内。
-
35.发明申请Methods and apparatus for evaluating the eye margin of a communications device using a data eye monitor 有权使用数据眼监视器评估通信设备的眼边的方法和装置公开(公告)号：US20070268962A1
公开(公告)日：2007-11-22
申请号：US11434688
申请日：2006-05-16
IPC分类号： H04B17/00
CPC分类号： H04L1/20 , H04B17/309
摘要： Methods and apparatus are provided for evaluating the eye margin of a communications device using a data eye monitor. The quality of a data eye associated with a signal is evaluated by sampling the signal for a plurality of different phases; evaluating the samples to evaluate one or more of a height and width of the data eye; and determining whether the one or more of the height and width satisfy one or more predefined criteria. One or more parameters of the communications device can optionally be adjusted if the communications device does not satisfy the one or more predefined criteria. The communications device can optionally be assigned to a quality category based on the evaluation. A phase offset between a first clock signal used to sample the signal and one or more clocks used to sample data is reduced.
摘要翻译： 提供的方法和装置用于评估使用数据眼监护仪的通信设备的眼部边缘。 与信号相关联的数据眼的质量通过对多个不同相位的信号进行采样来评估; 评估样本以评估数据眼睛的高度和宽度中的一个或多个; 以及确定所述高度和宽度中的一个或多个是否满足一个或多个预定标准。 如果通信设备不满足一个或多个预定标准，则可以可选地调整通信设备的一个或多个参数。 可以根据评估可选地将通信设备分配给质量类别。 减少用于采样信号的第一时钟信号与用于采样数据的一个或多个时钟之间的相位偏移。
-
36.发明授权公开(公告)号：US07923868B2
公开(公告)日：2011-04-12
申请号：US12012761
申请日：2008-02-05
IPC分类号： H02J3/00
CPC分类号： H03K19/0027 , G06F1/3203 , H03K19/00384 , Y10T307/74
摘要： Disclosed is a circuit configured to apply a supply voltage to a switching element (e.g., a transistor). The circuit includes a latch and a processor. The latch is configured to sample a voltage of an output signal of the switching element, and the processor is configured to generate a power adjustment signal to adjust the supply voltage based on the voltage sampled by the latch.
摘要翻译： 公开了一种被配置为向开关元件（例如，晶体管）施加电源电压的电路。 该电路包括一个锁存器和一个处理器。 锁存器被配置为对开关元件的输出信号的电压进行采样，并且处理器被配置为产生功率调整信号，以基于由锁存器采样的电压来调节电源电压。
-
37.发明授权公开(公告)号：US07696800B2
公开(公告)日：2010-04-13
申请号：US12012758
申请日：2008-02-05
IPC分类号： H03K5/12
CPC分类号： H03K5/02 , H03K5/06 , H03K19/017581 , H04L25/0288
摘要： Disclosed is a circuit that adjusts a characteristic of a signal transmitted from a transmitter to a receiver over a communication channel (e.g., a wire, a backplane, etc.). The circuit includes a latch that receives the signal at a predetermined point in the circuit and samples a voltage of the signal many times after a threshold voltage is applied to the latch. The circuit also includes a processor that determines the characteristic of the signal when the sampled voltages indicate a transition point and that adjusts the threshold voltage when the sampled voltages do not indicate a transition point. The processor adjusts the characteristic of the signal by adjusting at least one of a current and a voltage of the transmitter when the characteristic of the signal is outside a predetermined range.
摘要翻译： 公开了一种通过通信信道（例如，线，背板等）调整从发射机发射到接收机的信号的特性的电路。 该电路包括一个锁存器，该锁存器在阈值电压施加到锁存器之后多次接收电路中预定点处的信号并对信号的电压进行多次采样。 该电路还包括一个处理器，当采样电压指示转换点时，确定信号的特性，并且当采样电压不指示转换点时调整阈值电压。 当信号的特性在预定范围之外时，处理器通过调节发射机的电流和电压中的至少一个来调整信号的特性。
-
38.发明申请公开(公告)号：US20080191789A1
公开(公告)日：2008-08-14
申请号：US12012761
申请日：2008-02-05
IPC分类号： G05F1/10
CPC分类号： H03K19/0027 , G06F1/3203 , H03K19/00384 , Y10T307/74
摘要： Disclosed is a circuit configured to apply a supply voltage to a switching element (e.g., a transistor). The circuit includes a latch and a processor. The latch is configured to sample a voltage of an output signal of the switching element, and the processor is configured to generate a power adjustment signal to adjust the supply voltage based on the voltage sampled by the latch.
摘要翻译： 公开了一种被配置为向开关元件（例如，晶体管）施加电源电压的电路。 该电路包括一个锁存器和一个处理器。 锁存器被配置为对开关元件的输出信号的电压进行采样，并且处理器被配置为产生功率调整信号，以基于由锁存器采样的电压来调节电源电压。
-
39.发明授权公开(公告)号：US07312667B2
公开(公告)日：2007-12-25
申请号：US11221316
申请日：2005-09-07
IPC分类号： H03B27/00
CPC分类号： H03L7/00 , H04L7/0337
摘要： The present invention addresses the generation of a controlled clock source for use in trimming VCDL delay line output clocks. In this trimming process, adjustments are made for static variations in these output clocks. The invention's use of a controlled clock source eliminates the need for this trimming process to be conducted in real time and reduces the expense of the circuitry required.
摘要翻译： 本发明解决了用于微调VCDL延迟线输出时钟的受控时钟源的产生。 在这个修整过程中，对这些输出时钟的静态变化进行调整。 本发明使用受控的时钟源消除了对该修整过程的实时性的需要，并且降低了所需电路的费用。
-
40.发明申请公开(公告)号：US20120068762A1
公开(公告)日：2012-03-22
申请号：US13304759
申请日：2011-11-28
IPC分类号： H02J4/00
CPC分类号： H02J1/00
摘要： Disclosed is a circuit for adjusting a voltage supplied to an IC by a power supply circuit that produces a regulated-output voltage based on an output-control signal generated by a resistive voltage divider. The circuit includes a PVT detector configured to generate an interface control signal and an interface circuit (i) connected to PVT detector and to the resistive voltage divider and (ii) configured to adjust its resistance in response to the interface control signal. Adjusting the resistance of the interface circuit causes the voltage of the output-control signal to be adjusted, thus causing the power supply circuit to adjust the regulated output voltage.
摘要翻译： 公开了一种用于通过电源电路来调节提供给IC的电压的电路，该电源电路基于由电阻分压器产生的输出控制信号产生调节输出电压。 电路包括配置成产生接口控制信号的PVT检测器和连接到PVT检测器和电阻分压器的接口电路（i），以及（ii）被配置为响应于接口控制信号调整其电阻。 调整接口电路的电阻可以调节输出控制信号的电压，从而使电源电路调整稳压输出电压。
-
-
-
-
-
-
-
-
-
搜索结果
96 条记录 (耗时 0.028 秒)