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公开(公告)号：US20220201611A1
公开(公告)日：2022-06-23
申请号：US17552766
申请日：2021-12-16
Inventor： Hyuk KIM , HYUNG-IL PARK , Tae Wook KANG , Sung Eun KIM , Mi Jeong PARK , Kyung Jin BYUN , KWANG IL OH , Sukho LEE , Jae-Jin LEE , In Gi LIM , Kyuseung HAN
Abstract: Disclosed is an operating method of a user communication device, which includes receiving a wakeup signal from a stationary communication device over a first human body communication channel, the wakeup signal having a frequency in a low frequency band, switching from a standby mode to a wakeup mode in response to the wakeup signal, and receiving a data signal from the stationary communication device over the first human body communication channel during the wakeup mode, and the first human body communication channel is provided by a body of a user of the user communication device.
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公开(公告)号：US20220156556A1
公开(公告)日：2022-05-19
申请号：US17446685
申请日：2021-09-01
Inventor： Kwang IL OH , Tae Wook KANG , Sung Eun KIM , Hyuk KIM , Hyung-IL PARK , Jae-Jin LEE
Abstract: Disclosed is a spiking neural network circuit, which includes an axon circuit that generates an input spike signal, a first synapse zone and a second synapse zone each including one or more synapses, wherein each of the synapses is configured to perform an operation based on the input spike signal and each weight, and a neuron circuit that generates an output spike signal based on operation results of the synapses. The input spike signal is transferred to the first synapse zone and the second synapse zone through a tree structure, and each of branch nodes of the tree structure includes a driving buffer.
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公开(公告)号：US20200067516A1
公开(公告)日：2020-02-27
申请号：US16542469
申请日：2019-08-16
Inventor： KWANG IL OH , Tae Wook KANG , Sung Eun KIM , Hyuk KIM , Mi Jeong PARK , Hyung-IL PARK , Kyung Jin BYUN , Jae-Jin LEE , In Gi LIM
IPC: H03L7/093
Abstract: The inventive concept includes an oscillating circuit, a phase inverting circuit, and a phase detecting circuit. The oscillating circuit generates a first clock to be used to sample an input signal. The phase inverting circuit outputs a second clock based on the first clock. The phase detecting circuit generates a control signal having a first logic value when a phase difference between a phase of the input signal and a phase of the second clock is less than a reference value for a reference time or more. The phase detecting circuit generates the control signal having a second logic value when the phase difference is equal to or greater than the reference value or when the phase difference is less than the reference value for a time shorter than the reference time. The phase inverting circuit inverts the phase of the second clock when a logic value of the control signal changes from the first logic value to the second logic value or when a logic value of the control signal changes from the second logic value to the first logic value.
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公开(公告)号：US20160148358A1
公开(公告)日：2016-05-26
申请号：US14951152
申请日：2015-11-24
Inventor： Hyuk KIM
CPC classification number: G09G5/39 , G06T1/60 , G06T5/002 , G06T5/20 , G09G2360/18
Abstract: An apparatus for Gaussian filtering includes an image buffer for generating mask region data which includes pixel values of pixels located on a mask in an input image, and a Gaussian filter core for arranging the mask region data to generate pixel array values referring to an index array corresponding to a size of the mask, and applying Gaussian filtering to the pixel array values to generate Gaussian filtering values.
Abstract translation: 一种用于高斯滤波的装置包括用于产生掩模区域数据的图像缓冲器，该掩模区域数据包括位于输入图像中的掩模上的像素的像素值，以及高斯滤波器核，用于布置掩模区域数据以参考索引阵列生成像素阵列值 对应于掩模的尺寸，并且对像素阵列值应用高斯滤波以产生高斯滤波值。
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