中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

18 records (took 0.029 seconds)

    CAPSULE ENDOSCOPE IMAGE RECEIVER AND CAPSULE ENDOSCOPE DEVICE HAVING THE SAME
    1.
    发明申请
    CAPSULE ENDOSCOPE IMAGE RECEIVER AND CAPSULE ENDOSCOPE DEVICE HAVING THE SAME 审中-公开

    公开(公告)号：US20200315438A1

    公开(公告)日：2020-10-08

    申请号：US16842497

    申请日：2020-04-07

    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

    Inventor： Kwang IL OH ,  Tae Wook KANG ,  Sung Eun KIM ,  Hyuk KIM ,  Mi Jeong PARK ,  Hyung-IL PARK ,  Kyung Jin BYUN ,  Jae-Jin LEE ,  In Gi LIM

    IPC: A61B1/04 ,  A61B5/00 ,  A61B1/00

    Abstract: A capsule endoscope image receiver includes a receiving electrode unit that receives first and second differential signals from a capsule endoscope image transmitter through a human body communication channel, an analog amplifying unit that receives the first and second differential signals and outputs first and second amplified differential signals, and a signal restoring unit that receives the first and second amplified differential signals and restores image information. The analog amplifying unit includes a first amplifier that outputs the first amplified differential signal, a second amplifier that outputs the second amplified differential signal, and an input impedance that is connected between a first inverting input terminal of the first amplifier and a second inverting input terminal of the second amplifier and obtains a gain of differential signal amplification in which a high frequency component of the first and second amplified differential signals is greater than a low frequency component.

    ELECTRONIC CIRCUIT FOR ADJUSTING PHASE OF CLOCK
    5.
    发明申请
    ELECTRONIC CIRCUIT FOR ADJUSTING PHASE OF CLOCK 审中-公开

    公开(公告)号：US20200067516A1

    公开(公告)日：2020-02-27

    申请号：US16542469

    申请日：2019-08-16

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： KWANG IL OH ,  Tae Wook KANG ,  Sung Eun KIM ,  Hyuk KIM ,  Mi Jeong PARK ,  Hyung-IL PARK ,  Kyung Jin BYUN ,  Jae-Jin LEE ,  In Gi LIM

    IPC: H03L7/093

    Abstract: The inventive concept includes an oscillating circuit, a phase inverting circuit, and a phase detecting circuit. The oscillating circuit generates a first clock to be used to sample an input signal. The phase inverting circuit outputs a second clock based on the first clock. The phase detecting circuit generates a control signal having a first logic value when a phase difference between a phase of the input signal and a phase of the second clock is less than a reference value for a reference time or more. The phase detecting circuit generates the control signal having a second logic value when the phase difference is equal to or greater than the reference value or when the phase difference is less than the reference value for a time shorter than the reference time. The phase inverting circuit inverts the phase of the second clock when a logic value of the control signal changes from the first logic value to the second logic value or when a logic value of the control signal changes from the second logic value to the first logic value.

    DEVICE AND METHOD FOR CONVERTING DATA RATE
    7.
    发明申请
    DEVICE AND METHOD FOR CONVERTING DATA RATE 有权
    用于转换数据速率的装置和方法

    公开(公告)号：US20150097708A1

    公开(公告)日：2015-04-09

    申请号：US14206522

    申请日：2014-03-12

    Applicant: Electronics and Telecommunications Research Institute

    Inventor： Mi Jeong PARK ,  Ik Soo EO ,  Sang-Kyun KIM

    IPC: H03M7/00

    CPC classification number: H03H17/0628

    Abstract: A data rate conversion device generates a first parameter representing a memory address position to sample and a second parameter representing a phase value of an estimation time point, records input data at a memory based on an input clock, outputs sampled continued data from the memory using the first parameter based on an output clock, and generates and outputs final data using the continued data, a plurality of filter coefficients, and the second parameter.

    Abstract translation: 数据速率转换装置产生表示要采样的存储器地址位置的第一参数和表示估计时间点的相位值的第二参数，基于输入时钟将输入数据记录在存储器中，使用 基于输出时钟的第一参数，并且使用连续数据，多个滤波器系数和第二参数来生成和输出最终数据。

Patent Agency Ranking