System, apparatus and method of reducing adverse performance impact due to migration of processes from one CPU to another
    31.
    发明申请
    System, apparatus and method of reducing adverse performance impact due to migration of processes from one CPU to another 审中-公开
    减少由一个CPU向另一个CPU迁移的不利性能影响的系统,设备和方法

    公开(公告)号:US20060037017A1

    公开(公告)日:2006-02-16

    申请号:US10916985

    申请日:2004-08-12

    IPC分类号: G06F9/46

    CPC分类号: G06F9/5088

    摘要: A system, apparatus and method of reducing adverse performance impact due to migration of processes from one processor to another in a multi-processor system are provided. When a process is executing, the number of cycles it takes to fetch each instruction (CPI) of the process is stored. After execution of the process, an average CPI is computed and stored in a storage device that is associated with the process. When a run queue of the multi-processor system is empty, a process may be chosen from the run queue that has the most processes awaiting execution to migrate to the empty run queue. The chosen process is the process that has the highest average number of CPIs.

    摘要翻译: 提供了一种在多处理器系统中减少由于处理器从一个处理器迁移到另一个处理器的不利性能影响的系统,装置和方法。 当进程正在执行时,存储获取进程的每个指令(CPI)所需的周期数。 在执行该过程之后,计算平均CPI并将其存储在与该过程相关联的存储设备中。 当多处理器系统的运行队列为空时,可以从运行队列中选择具有等待执行的最多进程迁移到空运行队列的进程。 所选择的过程是具有最高平均CPI值的过程。

    Scheduling threads in a multi-processor computer
    32.
    发明申请
    Scheduling threads in a multi-processor computer 审中-公开
    在多处理器计算机中调度线程

    公开(公告)号:US20050246461A1

    公开(公告)日:2005-11-03

    申请号:US10834498

    申请日:2004-04-29

    IPC分类号: G06F9/48 G06F12/14

    CPC分类号: G06F9/4812

    摘要: Scheduling threads in a multi-processor computer system including establishing an interrupt threshold for a thread, where the interrupt threshold represents a maximum permissible number of interrupts during thread execution on a processor; executing the thread on a current processor, where the thread has thread affinity for one or more processors including the current processor; counting a number of interrupts during execution of the thread on the current processor; and removing thread affinity for the current processor in dependence upon the counted number of interrupts and the interrupt threshold.

    摘要翻译: 在多处理器计算机系统中调度线程,包括建立线程的中断阈值,其中中断阈值表示在处理器上执行线程期间的最大允许中断次数; 在当前处理器上执行线程,其中线程对于包括当前处理器的一个或多个处理器具有线程亲和性; 在当前处理器上的线程执行期间对多个中断进行计数; 并根据计数的中断次数和中断阈值去除当前处理器的线程亲和度。

    Optimized preemption and reservation of software locks for woken threads
    33.
    发明授权
    Optimized preemption and reservation of software locks for woken threads 失效
    优化抢占线程的软件锁的抢占和预留

    公开(公告)号:US08261279B2

    公开(公告)日:2012-09-04

    申请号:US12049304

    申请日:2008-03-15

    IPC分类号: G06F9/46

    CPC分类号: G06F9/526 G06F2209/522

    摘要: An approach is provided that reserves a software lock for a waiting thread is presented. When a software lock is released by a first thread, a second thread that is waiting for the same resource controlled by the software lock is woken up. In addition, a reservation to the software lock is established for the second thread. After the reservation is established, if the lock is available and requested by a thread other than the second thread, the requesting thread is denied, added to the wait queue, and put to sleep. In addition, the reservation is cleared. After the reservation has been cleared, the lock will be granted to the next thread to request the lock.

    摘要翻译: 提供了一种保留用于等待线程的软件锁的方法。 当软件锁由第一个线程释放时,等待软件锁定的相同资源的第二个线程被唤醒。 另外,针对第二线程建立对软件锁定的预约。 在建立预留之后,如果第二线程之外的线程可用并请求该锁,则请求线程被拒绝,被添加到等待队列中并进入休眠状态。 此外,预订已被清除。 预订清除后,锁将被授予下一个线程以请求锁定。

    Scheduling Threads In A Multi-Processor Computer
    34.
    发明申请
    Scheduling Threads In A Multi-Processor Computer 有权
    在多处理器计算机中调度线程

    公开(公告)号:US20080178183A1

    公开(公告)日:2008-07-24

    申请号:US12055179

    申请日:2008-03-25

    IPC分类号: G06F9/46

    CPC分类号: G06F9/4812

    摘要: Scheduling threads in a multi-processor computer system including establishing an interrupt threshold for a thread, where the interrupt threshold represents a maximum permissible number of interrupts during thread execution on a processor; executing the thread on a current processor, where the thread has thread affinity for one or more processors including the current processor; counting a number of interrupts during execution of the thread on the current processor; and removing thread affinity for the current processor in dependence upon the counted number of interrupts and the interrupt threshold.

    摘要翻译: 在多处理器计算机系统中调度线程,包括建立线程的中断阈值,其中中断阈值表示在处理器上的线程执行期间的最大允许中断次数; 在当前处理器上执行线程,其中线程对于包括当前处理器的一个或多个处理器具有线程亲和性; 在当前处理器上的线程执行期间对多个中断进行计数; 并根据计数的中断次数和中断阈值去除当前处理器的线程亲和度。

    System and method for CPI load balancing in SMT processors

    公开(公告)号:US20080098397A1

    公开(公告)日:2008-04-24

    申请号:US11955503

    申请日:2007-12-13

    IPC分类号: G06F9/46

    CPC分类号: G06F9/5083

    摘要: A system and method for scheduling threads in a Simultaneous Multithreading (SMT) processor environment utilizing multiple SMT processors is provided. Poor performing threads that are being run on each of the SMT processors are identified. After being identified, the poor performing threads are moved to a different SMT processor. Data is captured regarding the performance of threads. In one embodiment, this data includes each threads' CPI value. When a thread is moved, data regarding the thread and its performance at the time it was moved is recorded along with a timestamp. The data regarding previous moves is used to determine whether a thread's performance is improved following the move.

    System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval
    36.
    发明授权
    System and method for scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval 有权
    用于在同步多线程处理器中调度兼容线程的系统和方法,使用在指定时间间隔期间的每个指令值周期

    公开(公告)号:US07360218B2

    公开(公告)日:2008-04-15

    申请号:US10671132

    申请日:2003-09-25

    CPC分类号: G06F9/4881 G06F2209/483

    摘要: A system and method for identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.

    摘要翻译: 通过计算在SMT处理器上运行两个线程时发生的性能指标(例如每个指令周期(CPI)),可以提供用于在同时多线程(SMT)处理器环境中识别兼容线程的系统和方法。 确定在两个线程在SMT处理器上执行时实现的CPI。 如果实现的CPI优于兼容性阈值,则记录指示兼容性的信息。 当线程即将完成时,调度程序将查看完成线程所属的运行队列,以调度另一个线程。 调度程序标识(1)与SMT处理器上仍然运行的线程(即,即将完成的线程)兼容的线程,以及(2)准备执行。 持续更新CPI数据,以便不断地识别彼此兼容的线程。

    System and method for delayed priority boost
    37.
    发明授权
    System and method for delayed priority boost 失效
    用于延迟优先级提升的系统和方法

    公开(公告)号:US08132178B2

    公开(公告)日:2012-03-06

    申请号:US11943649

    申请日:2007-11-21

    IPC分类号: G06F9/46

    CPC分类号: G06F9/52 G06F9/4818

    摘要: A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system resource, a user mode accessible data area is updated indicating that the thread is in a critical section and, if the kernel receives a preemption event, the priority boost that the thread should receive. If the kernel receives a preemption event before the thread finishes the critical section, the kernel applies the priority boost on behalf of the thread. Often, the thread will finish the critical section without having to have its priority actually boosted. If the thread does receive an actual priority boost then, after the critical section is finished, the kernel resets the thread's priority to a normal level.

    摘要翻译: 提供了一种用于延迟执行线程的优先级提升的系统和方法。 当线程准备进入代码的关键部分时,例如当线程利用共享系统资源时,更新用户模式可访问数据区域,指示线程处于关键部分,并且如果内核接收到抢占事件, 线程应该接收的优先级提升。 如果内核在线程完成关键部分之前收到抢占事件,则内核将代表线程应用优先级提升。 通常,线程将完成关键部分,而无需实际提升优先级。 如果线程确实接收到实际的优先级提升,那么在关键部分完成之后,内核会将线程的优先级重置为正常级别。

    Scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval
    38.
    发明授权
    Scheduling compatible threads in a simultaneous multi-threading processor using cycle per instruction value occurred during identified time interval 有权
    在指定的时间间隔内,使用每个指令周期的周期调度同时多线程处理器中的兼容线程

    公开(公告)号:US07698707B2

    公开(公告)日:2010-04-13

    申请号:US12036804

    申请日:2008-02-25

    IPC分类号: G06F9/30 G06F9/46

    CPC分类号: G06F9/4881 G06F2209/483

    摘要: Identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.

    摘要翻译: 通过计算在SMT处理器上运行两个线程时发生的性能指标(例如每个指令周期(CPI))来提供在同时多线程(SMT)处理器环境中识别兼容线程。 确定在两个线程在SMT处理器上执行时实现的CPI。 如果实现的CPI优于兼容性阈值,则记录指示兼容性的信息。 当线程即将完成时,调度程序将查看完成线程所属的运行队列,以调度另一个线程。 调度程序标识(1)与SMT处理器上仍然运行的线程(即,即将完成的线程)兼容的线程,以及(2)准备执行。 持续更新CPI数据,以便不断地识别彼此兼容的线程。

    System and method for CPI load balancing in SMT processors
    39.
    发明授权
    System and method for CPI load balancing in SMT processors 失效
    SMT处理器中CPI负载平衡的系统和方法

    公开(公告)号:US07353517B2

    公开(公告)日:2008-04-01

    申请号:US10671057

    申请日:2003-09-25

    IPC分类号: G06F9/46

    CPC分类号: G06F9/5083

    摘要: A system and method for scheduling threads in a Simultaneous Multithreading (SMT) processor environment utilizing multiple SMT processors is provided. Poor performing threads that are being run on each of the SMT processors are identified. After being identified, the poor performing threads are moved to a different SMT processor. Data is captured regarding the performance of threads. In one embodiment, this data includes each threads' CPI value. When a thread is moved, data regarding the thread and its performance at the time it was moved is recorded along with a timestamp. The data regarding previous moves is used to determine whether a thread's performance is improved following the move.

    摘要翻译: 提供了一种利用多个SMT处理器的同时多线程(SMT)处理器环境中调度线程的系统和方法。 识别在每个SMT处理器上运行的执行不良线程。 被识别后,执行不良的线程被移动到不同的SMT处理器。 捕获关于线程性能的数据。 在一个实施例中,该数据包括每个线程的CPI值。 当线程移动时,与线程及其在移动时的性能相关的数据与时间戳一起被记录。 关于先前移动的数据用于确定线程的性能是否随着移动而改善。

    System and method for optimized preemption and reservation of software locks
    40.
    发明申请
    System and method for optimized preemption and reservation of software locks 审中-公开
    用于优化软件锁抢占和预约的系统和方法

    公开(公告)号:US20070136725A1

    公开(公告)日:2007-06-14

    申请号:US11301104

    申请日:2005-12-12

    IPC分类号: G06F9/46

    CPC分类号: G06F9/526 G06F2209/522

    摘要: A system and method is provided that reserves a software lock for a waiting thread is presented. When a software lock is released by a first thread, a second thread that is waiting for the same resource controlled by the software lock is woken up. In addition, a reservation to the software lock is established for the second thread. After the reservation is established, if the lock is available and requested by a thread other than the second thread, the requesting thread is denied, added to the wait queue, and put to sleep. In addition, the reservation is cleared. After the reservation has been cleared, the lock will be granted to the next thread to request the lock.

    摘要翻译: 提供了一种保留用于等待线程的软件锁的系统和方法。 当软件锁由第一个线程释放时,等待软件锁定的相同资源的第二个线程被唤醒。 另外,针对第二线程建立对软件锁定的预约。 在建立预留之后,如果第二线程之外的线程可用并请求该锁,则请求线程被拒绝,被添加到等待队列中并进入休眠状态。 此外,预订已被清除。 预订清除后,锁将被授予下一个线程以请求锁定。