Abstract:
System and method of testing performance of a data packet signal transceiver (DUT). Multiple DUT signals, with each having a respective DUT transmit power (RDTPn) received by the tester and corresponding to one (IDTPn) of multiple intended DUT transmit powers, for n=1, . . . , m, with a power equal to a minimum IDTP, maximum IDTP, or intermediate IDTP therebetween. Following association of each RDTPn with its IDTPn, a tester signal is sent having a trigger frame and tester transmit output power (TTOP). The trigger frame includes data corresponding to a reported tester transmit power (RTTP), and a desired signal strength (TRSS) of a DUT data packet signal to be received by the tester. A return DUT signal having a RDTPn is received, from which an IDTPn corresponding to the RDTPn is determined and compared to RTTP-TTOP+TRSS. Successive repetitions of such tester and DUT signals and IDTPn comparisons for multiple combinations of values of the TTOP, RTTP and DRSS enable testing reception performance of the DUT, including extracting RSSI measurements, with minimal signal interactions between tester and DUT.
Abstract:
A method for testing a data packet signal transceiver device under test (DUT). Following initial signal communications with a DUT, timing of further transmissions by the DUT may be effectively controlled by transmitting congestive communication channel signals to cause the DUT to detect apparent communication channel activity and in response thereto delay its own signal transmissions.
Abstract:
System and method for controlling test flow of a radio frequency (RF) signal transceiver device under test (DUT) by inducing an interrupt via an internal signal interface or an external signal interface (with one example of the latter being a baseband signal interface for conveying audio signals). With exemplary embodiments, one or more DUT control signals are provided to or otherwise initiated within the DUT by inducing an interrupt, including inducement via use of the signal interface. With further exemplary embodiments, one or more test control signals are also provided to RF circuitry that responds by transmitting one or more RF receive signals for the DUT and receives from the DUT one or more RF transmit signals related to the one or more DUT control signals.
Abstract:
Method for testing a radio frequency (RF) data packet signal transceiver device under test (DUT) including communicating via at least one of multiple available signal channels. Data packets exchanged between a tester and DUT as a normal part of a communication link initiation sequence are selectively exchanged and suppressed to enable testing of the DUT without requiring inclusion of special drivers within the DUT, special test software within the tester or establishment of a synchronized communication link between the tester and DUT. For example, in the case of a Bluetooth low energy transceiver, advertisement, scan request and scan response data packets can be used in such manner.
Abstract:
Method for testing a radio frequency (RF) data packet signal transceiver device under test (DUT) including communicating via each one of multiple available signal channels. Data packets exchanged between a tester and DUT as a normal part of a communication link initiation sequence are exchanged in such a manner that the tester transmits with varied signal power via all available channels simultaneously, thereby ensuring that a properly working DUT will transmit in response to reception of tester data packets having sufficient signal power. For example, in the case of a Bluetooth low energy transceiver, advertisement, scan request and scan response data packets can be used in such manner.
Abstract:
A system and method for testing one or more wireless data packet signal transceiver devices under test (DUTs). Incoming data packets from a DUT are monitored to discern between data packets transmitted as part of a DUT calibration cycle or initial data packets being transmitted as the DUT transmitter circuitry settles at its new settings (e.g., transmit signal frequency or power), and later data packets transmitted following completion of the DUT calibration cycle or settling of the DUT transmitter circuitry. Following identification of these later data packets, the tester is so notified and begins the test procedure, e.g., capturing the data packets for analysis. Meanwhile, the tester has been allowed to remain in active use for other test purposes during DUT calibration cycles and settling intervals, thereby increasing testing efficiency and reducing overall test time.
Abstract:
A system and method for enabling testing a data link of a data packet signal transceiver device under test (DUT). A RX data packet signal originating from a reference device is conveyed for reception by a DUT, and a TX data packet signal originating from the DUT is conveyed for reception by the reference device. At least a portion of the RX data packet signal is conveyed with a signal attenuation and at least a portion of the TX data packet signal is conveyed with a different signal attenuation.
Abstract:
A method of testing, such as for a bit error rate (BER), of multiple data packet signal transceivers during which a tester and the data packet signal transceivers exchange sequences of test data packets and summary data packets. The tester provides the test data packets which contain respective pluralities of data bits with respective predetermined bit patterns. Responsive thereto, the data packet signal transceivers provide the summary data packets which contain respective summary data indicative of the number of data bits with the respective predetermined bit patterns that are correctly received by corresponding ones of the data packet signal transceivers.
Abstract:
A system and method for testing signal reception by a data packet signal transceiver. By monitoring signals provided to and returning from a device under test (DUT), e.g., stimulus and response signals, respectively, it can be determined whether and when the DUT has received a faulty data packet or received a valid data packet in a faulty manner. When such events occur, appropriate control signals are provided for instructing the test signal reception and analysis subsystem (e.g., a vector signal analyzer) to capture and retain for analysis such faulty data packet or valid data packet received in a faulty manner. This enables the data packet reception test results to identify the number of data packets correctly received within the prescribed time interval and identify which data packet reception faults are due to reception of a faulty data packet or reception of a valid data packet in a faulty manner.