公开(公告)号：US12045461B2

公开(公告)日：2024-07-23

申请号：US17876355

申请日：2022-07-28

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0604 ,  G06F3/0619 ,  G06F3/0652 ,  G06F3/0673

Abstract: A victim management unit (MU) for performing a media management operation is identified. The victim MU stores valid data. An ordered set cursors is maintained. A source cursor of the ordered set of cursors associated with the victim MU is identified. A target cursor of the ordered set of cursors referencing one or more available MUs is identified as the cursor following the source cursor in the ordered set of cursors. The valid data is associated with the identified target cursor.

公开(公告)号：US20240193085A1

公开(公告)日：2024-06-13

申请号：US18526754

申请日：2023-12-01

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F12/0815

CPC classification number: G06F12/0815

Abstract: A memory sub-system having a paging system to provide memory services over a connection from its host interface to a host system. The connection can support both a storage access protocol and a cache coherent memory access protocol. The memory sub-system can have a non-volatile memory to provide a storage capacity and a fast, volatile memory to cache active pages of a memory space provided by a memory device attached by the memory sub-system over the connection to the host system. The memory space can be configured in a namespace of the storage capacity of the non-volatile memory. Optionally, the memory space can be configured for access both via the storage access protocol using logical block addresses and via the cache coherent memory access protocol using memory addresses.

公开(公告)号：US20240184694A1

公开(公告)日：2024-06-06

申请号：US18508135

申请日：2023-11-13

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F12/02 ,  G06F16/23

CPC classification number: G06F12/0246 ,  G06F16/2358

Abstract: A computing device having a computer express link (CXL) connection between a memory sub-system and a host system to write records of a database into a storage portion of the memory sub-system and store data identifying changes to the database into a memory portion of the memory sub-system. The records can be written to the storage portion using a storage access protocol of the CXL connection; and the change data can be stored to the memory portion using a cache coherent memory access protocol of the CXL connection. The change data can be written from the memory portion to a file in the storage portion.

公开(公告)号：US11977742B2

公开(公告)日：2024-05-07

申请号：US17591551

申请日：2022-02-02

Applicant: Micron Technology, Inc.

Inventor： Joseph Harold Steinmetz ,  Luca Bert

IPC: G06F12/00 ,  G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0659 ,  G06F3/067

Abstract: An apparatus with a solid state drive (SSD) having firmware to farm proof of space plots stored outside of the SSD. The SSD has a communication interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands to retrieve data from the memory cells and executions the write commands to store data into the memory cells. The firmware is executable in the SSD to receive and store configuration data specified via a user interface to indicate a location, outside of the SSD, storing a proof of space plot that can be used by the SSD to participate in proof of space activities in a cryptocurrency network.

公开(公告)号：US11966638B2

公开(公告)日：2024-04-23

申请号：US17720136

申请日：2022-04-13

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/00 ,  G06F3/06 ,  G06F11/10

CPC classification number: G06F3/0689 ,  G06F3/0604 ,  G06F3/0655 ,  G06F11/1032 ,  G06F11/1076 ,  G06F11/108

Abstract: Aspects of the present disclosure configure a system component, such as memory sub-system controller, to dynamically generate Redundant Array of Independent Nodes (RAIN) parity information for zone-based memory allocations. The RAIN parity information is generated for a given zone or set of zones on the basis of whether the given zone or set of zones satisfy a zone completeness criterion. The zone completeness criterion can represent a specified size such that when a given zone reaches the specified size, the parity information for that zone is generated.

公开(公告)号：US20240069739A1

公开(公告)日：2024-02-29

申请号：US18502764

申请日：2023-11-06

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Luca Bert

IPC: G06F3/06 ,  G06F12/02

CPC classification number: G06F3/0613 ,  G06F3/0631 ,  G06F3/0652 ,  G06F3/0683 ,  G06F12/0246 ,  G06F2212/7201

Abstract: An input/output (I/O) write request directed at memory devices is received by a processing device. The write request includes a data object. The memory devices include groups of memory cells corresponding to sequential logical addresses. The data object is appended to a compound data object associated with one of the memory devices. The compound data object is associated with the groups of memory cells. A first group of memory cells is in the not-full state, and one or more subsequent, in an order corresponding to the sequential logical addresses, groups of memory cells is identified as a free group of memory cells. The compound data object is caused to be written to the groups of memory cells, resulting in the full state of the first group of memory cells and resulting in the not-full state of at least one of the one or more subsequent groups of memory.

公开(公告)号：US20240028230A1

公开(公告)日：2024-01-25

申请号：US18337819

申请日：2023-06-20

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0659 ,  G06F3/0652 ,  G06F3/0679 ,  G06F3/0604

Abstract: A memory sub-system, such as a solid-state drive, configured to map a write stream to superblocks without the stream identifying a zone having a predetermined size in a namespace. The memory sub-system is configured to maintain, for the stream, a cursor configured to identify one of the plurality of superblocks as being reserved entirely for the stream; map, based on a superblock identified by the cursor, logical addresses of write commands in a contiguous segment of the stream to physical addresses in the superblock until the superblock is full; store data of write commands in the stream into based on mapping from logical addresses to physical addresses identified via the cursor; and allocate, for the cursor and in response to the superblock identified by the cursor being full, a free superblock available to continue mapping logical addresses to physical address.

公开(公告)号：US20240020049A1

公开(公告)日：2024-01-18

申请号：US17866336

申请日：2022-07-15

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/061 ,  G06F3/0679

Abstract: A storage product manufactured as a component to be installed in a computing device to provide network storage services. The storage product has a network interface to receive storage access messages from a remote host system, a bus connector connectable via an external computer bus to an external local host system, a local storage device, and a computational storage processor. The storage product is configured to: separate the storage access messages into first messages, second messages, and third messages; provide the first messages to an external local host system to generate fourth messages; and provide the second messages to the computational storage processor to generate fifth messages. To implement network storage services provided via the network interface, the local storage device executes commands in the third messages, the fourth messages from the local host system, and the fifth messages from the computational storage processor.

公开(公告)号：US20240020046A1

公开(公告)日：2024-01-18

申请号：US17866276

申请日：2022-07-15

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0679 ,  G06F3/0604

Abstract: An apparatus having a solid-state drive, a host interface, a network interface, and a controller configured to recover, from packets received in the network interface from a remote host system, first control messages and data messages containing host data provided by the remote host system. The controller is further configured to: send the first control messages via the host interface to a local host system to receive second control messages from the local host system; and process the second control messages and the data messages, without sending the data message to the local host system, to write the host data into the solid-state drive. When the first control messages include read requests, the controller is further configured to retrieve data from the solid-state drive and send, via the network interface, the retrieved data to the remote host system without going through the local host system.

公开(公告)号：US20230409420A1

公开(公告)日：2023-12-21

申请号：US18231334

申请日：2023-08-08

Applicant: Micron Technology, Inc.

Inventor： Luca Bert ,  Joseph H. Steinmetz

IPC: G06F11/07 ,  G06F11/30 ,  G06F3/06

CPC classification number: G06F11/0727 ,  G06F11/0772 ,  G06F11/3034 ,  G06F3/0619 ,  G06F3/0629 ,  G06F3/0659 ,  G06F3/067

Abstract: Operations include identifying a system failure affecting visibility, to at least one dual port node of a plurality of dual port nodes, of at least one of a first volume of a plurality of volumes of a first memory device or a second volume of the plurality of volumes, and modifying a visibility configuration to address the system failure. Each volume of the plurality of volumes includes a persistent memory region (PMR). Modifying the visibility configuration includes modifying the visibility of at least one of the first volume or the second volume to the at least one dual port node of the plurality of dual port nodes through its first port or its second port via the at least one switch domain of the plurality of switch domains.