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公开(公告)号：US20190273921A1
公开(公告)日：2019-09-05
申请号：US16287252
申请日：2019-02-27
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/46 , H04N19/107 , H04N19/176
Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: writes, into a bitstream, one or more parameters including a first parameter indicating that a first partition of an image is to be split into a plurality of partitions including at least a second partition which is a non-rectangular partition; splits the first partition, based on the first parameter; and encodes at least the second partition.
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公开(公告)号：US20250024021A1
公开(公告)日：2025-01-16
申请号：US18899768
申请日：2024-09-27
Inventor： Ru Ling LIAO , Chong Soon LIM , Hai Wei SUN , Han Boon TEO , Jing Ya LI , Sughosh Pavan SHASHIDHAR , Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA
IPC: H04N19/105 , H04N19/159 , H04N19/176 , H04N19/46
Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. The circuitry, in operation, stores a first parameter into a bitstream, the first parameter indicating, as a prediction mode, one of (i) a multiple prediction mode in which a prediction image is generated by overlapping an inter prediction image of a current block and an intra prediction image of the current block and (ii) one of a plurality of prediction modes including a non-rectangular mode in which a prediction image is generated for each non-rectangular partition in the current block, and encodes the current block according to the prediction mode.
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公开(公告)号：US20240357169A1
公开(公告)日：2024-10-24
申请号：US18760731
申请日：2024-07-01
Inventor： Chong Soon LIM , Han Boon TEO , Takahiro NISHI , Tadamasa TOMA , Ru Ling LIAO , Sughosh Pavan SHASHIDHAR , Hai Wei SUN
IPC: H04N19/597 , G06T5/80 , H04N19/159 , H04N19/176 , H04N19/46 , H04N19/85
CPC classification number: H04N19/597 , G06T5/80 , H04N19/159 , H04N19/176 , H04N19/46 , H04N19/85
Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
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公开(公告)号：US20230421809A1
公开(公告)日：2023-12-28
申请号：US18242846
申请日：2023-09-06
Inventor： Chong Soon LIM , Han Boon TEO , Takahiro NISHI , Tadamasa TOMA , Ru Ling LIAO , Sughosh Pavan SHASHIDHAR , Hai Wei SUN
IPC: H04N19/597 , H04N19/46 , H04N19/159 , H04N19/176 , G06T5/00
CPC classification number: H04N19/597 , H04N19/46 , H04N19/159 , H04N19/176 , G06T5/006 , H04N19/85
Abstract: An encoder capable of properly handling an image to be encoded or decoded includes processing circuitry and memory connected to the processing circuitry. Using the memory, the processing circuitry: obtains parameters including at least one of (i) one or more parameters related to a first process for correcting distortion in an image captured with a wide angle lens and (ii) one or more parameters related to a second process for stitching a plurality of images; generates an encoded image by encoding a current image to be processed that is based on the image or the plurality of images; and writes the parameters into a bitstream including the encoded image.
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公开(公告)号：US20230362397A1
公开(公告)日：2023-11-09
申请号：US18355164
申请日：2023-07-19
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/44 , H04N19/105 , H04N19/139 , H04N19/176 , H04N19/513
CPC classification number: H04N19/44 , H04N19/105 , H04N19/139 , H04N19/176 , H04N19/521
Abstract: An image encoder includes circuitry and a memory, wherein the circuitry, in operation, determines whether inter prediction is to be applied to a current block; in response to determining that the inter prediction is to be applied to the current block, performs a partition prediction process; and, in response to determining that the inter prediction is not to be applied, encodes the current block without using the partition prediction process. The partition prediction process includes predicting first values of a set of pixels between a first partition and a second partition in the current block, using a first motion vector for the first partition; predicting second values of the set of pixels, using a second motion vector for the second partition; weighting the first values and the second values; and generating a prediction image for the current block using the weighted first values and the weighted second values.
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Patent Agency Ranking
36.发明公开公开(公告)号：US20230171423A1
公开(公告)日：2023-06-01
申请号：US18103567
申请日：2023-01-31
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/513 , H04N19/132 , H04N19/176 , H04N19/563
CPC classification number: H04N19/513 , H04N19/132 , H04N19/176 , H04N19/563
Abstract: The present disclosure provides systems and methods for video coding. The systems include, for example, an image encoder comprising: circuitry; and a memory coupled to the circuitry, wherein the circuitry, in operation, performs the following: predicting a first block of prediction samples for a current block of a picture, wherein predicting the first block of prediction samples includes at least a prediction process with a motion vector from a different picture; padding the first block of prediction samples to form a second block of prediction samples, wherein the second block is larger than the first block; calculating at least a gradient using the second block of prediction samples; and encoding the current block using at least the calculated gradient.
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公开(公告)号：US20230156214A1
公开(公告)日：2023-05-18
申请号：US18067519
申请日：2022-12-16
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/51 , H04N19/176 , H04N19/182
CPC classification number: H04N19/51 , H04N19/176 , H04N19/182
Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
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公开(公告)号：US20230083364A1
公开(公告)日：2023-03-16
申请号：US18056542
申请日：2022-11-17
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US20230075757A1
公开(公告)日：2023-03-09
申请号：US18056136
申请日：2022-11-16
Inventor： Kiyofumi ABE , Takahiro NISHI , Tadamasa TOMA , Ryuichi KANOH , Chong Soon LIM , Ru Ling LIAO , Hai Wei SUN , Sughosh Pavan SHASHIDHAR , Han Boon TEO , Jing Ya LI
IPC: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US20230074281A1
公开(公告)日：2023-03-09
申请号：US17987633
申请日：2022-11-15
Inventor： Tadamasa TOMA , Takahiro NISHI , Kiyofumi ABE , Ryuichi KANOH , Chong Soon LIM , Sughosh Pavan SHASHIDHAR , Ru Ling LIAO , Hai Wei SUN , Han Boon TEO , Jing Ya LI
IPC: H04N19/119 , H04N19/157 , H04N19/176
Abstract: An encoder partitions into blocks using a set of block partition modes. The set of block partition modes includes a first partition mode for partitioning a first block, and a second block partition mode for partitioning a second block which is one of blocks obtained after the first block is partitioned. When the number of partitions of the first block partition mode is three, the second block is a center block among the blocks obtained after partitioning the first block, and the partition direction of the second block partition mode is same as the partition direction of the first block partition mode, the second block partition mode indicates that the number of partitions is only three. A parameter for identifying the second block partition mode includes a first flag indicating a horizontal or vertical partition direction, and does not include a second flag indicating the number of partitions.
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