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公开(公告)号：US20110179258A1
公开(公告)日：2011-07-21
申请号：US12688679
申请日：2010-01-15
CPC分类号： G06F12/0859 , G06F9/30189 , G06F9/383 , G06F9/3836 , G06F9/3842 , G06F9/3857 , G06F9/3863
摘要： The described embodiments provide a system for executing instructions in a processor. In the described embodiments, upon detecting a return of input data for a deferred instruction while executing instructions in an execute-ahead mode, the processor determines whether a replay bit is set in a corresponding entry for the returned input data in a miss buffer. If the replay bit is set, the processor transitions to a deferred-execution mode to execute deferred instructions. Otherwise, the processor continues to execute instructions in the execute-ahead mode.
摘要翻译： 所描述的实施例提供了一种用于在处理器中执行指令的系统。 在所描述的实施例中，当在执行执行模式中执行指令时检测到用于延迟指令的输入数据的返回，处理器确定在错误缓冲器中对于返回的输入数据的相应条目中是否设置了重放位。 如果重放位被设置，则处理器转换到延迟执行模式以执行延迟指令。 否则，处理器继续执行执行模式的指令。
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公开(公告)号：US20110179254A1
公开(公告)日：2011-07-21
申请号：US12688633
申请日：2010-01-15
CPC分类号： G06F9/30079 , G06F9/3802 , G06F9/3842 , G06F9/3851 , G06F9/3861
摘要： The described embodiments relate to a processor that speculatively executes instructions. During operation, the processor often executes instructions in a speculative-execution mode. Upon detecting an impending pipe-clearing event while executing instructions in the speculative-execution mode, the processor stalls an instruction fetch unit to prevent the instruction fetch unit from fetching instructions. In some embodiments, the processor stalls the instruction fetch unit until a condition that originally caused the processor to operate in the speculative-execution mode is resolved. In alternative embodiments, the processor maintains the stall of the instruction fetch unit until the pipe-clearing event has been completed (i.e., has been handled in the processor).
摘要翻译： 所描述的实施例涉及推测性地执行指令的处理器。 在操作期间，处理器经常以推测执行模式执行指令。 当在推测执行模式下执行指令时检测到即将发生的管道清除事件，处理器停止指令提取单元以防止指令获取单元获取指令。 在一些实施例中，处理器停止指令提取单元，直到最初导致处理器以推测执行模式操作的条件被解决为止。 在替代实施例中，处理器维持指令提取单元的停止，直到管道清除事件已经完成（即，已经在处理器中处理）。
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公开(公告)号：US08984264B2
公开(公告)日：2015-03-17
申请号：US12688679
申请日：2010-01-15
CPC分类号： G06F12/0859 , G06F9/30189 , G06F9/383 , G06F9/3836 , G06F9/3842 , G06F9/3857 , G06F9/3863
摘要： The described embodiments provide a system for executing instructions in a processor. In the described embodiments, upon detecting a return of input data for a deferred instruction while executing instructions in an execute-ahead mode, the processor determines whether a replay bit is set in a corresponding entry for the returned input data in a miss buffer. If the replay bit is set, the processor transitions to a deferred-execution mode to execute deferred instructions. Otherwise, the processor continues to execute instructions in the execute-ahead mode.
摘要翻译： 所描述的实施例提供了一种用于在处理器中执行指令的系统。 在所描述的实施例中，当在执行执行模式中执行指令时检测到用于延迟指令的输入数据的返回，处理器确定在错误缓冲器中对于返回的输入数据的相应条目中是否设置了重放位。 如果重放位被设置，则处理器转换到延迟执行模式以执行延迟指令。 否则，处理器继续执行执行模式的指令。
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34.发明授权公开(公告)号：US08327188B2
公开(公告)日：2012-12-04
申请号：US12618282
申请日：2009-11-13
IPC分类号： G06F11/00
CPC分类号： G06F11/1405
摘要： The described embodiments provide a processor (e.g., processor 102) for executing instructions. During execution, the processor starts by transactionally executing instructions from a protected section of program code. The processor then encounters a transactional failure condition while transactionally executing the instructions from the protected section of program code. In response to encountering the transactional failure condition, the processor enters a transactional-scout mode and speculatively executes subsequent instructions in the transactional-scout mode.
摘要翻译： 所描述的实施例提供用于执行指令的处理器（例如，处理器102）。 在执行期间，处理器通过事先执行来自程序代码的受保护部分的指令来启动。 然后处理器在从程序代码的受保护部分事务地执行指令时遇到事务故障条件。 响应于遇到事务故障条件，处理器进入事务侦察模式并且在事务侦察模式中推测地执行后续指令。
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公开(公告)号：US08688963B2
公开(公告)日：2014-04-01
申请号：US12765744
申请日：2010-04-22
IPC分类号： G06F9/00
CPC分类号： G06F9/3863 , G06F9/3004 , G06F9/30087 , G06F9/3842 , G06F9/3857
摘要： The embodiments described in the instant application provide a system for generating checkpoints. In the described embodiments, while speculatively executing instructions with one or more checkpoints in use, upon detecting an occurrence of a predetermined operating condition or encountering a predetermined type of instruction, the system is configured to determine whether an additional checkpoint is to be generated by computing a factor based on one or more operating conditions of the processor. When the factor is greater than a predetermined value, the processor is configured to generate the additional checkpoint.
摘要翻译： 本申请中描述的实施例提供了一种用于生成检查点的系统。 在所描述的实施例中，当在使用中具有一个或多个检查点的推测执行指令时，在检测到预定操作条件的发生或遇到预定类型的指令时，该系统被配置为确定是否通过计算生成附加检查点 基于处理器的一个或多个操作条件的因素。 当因子大于预定值时，处理器被配置为生成附加检查点。
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公开(公告)号：US20110264898A1
公开(公告)日：2011-10-27
申请号：US12765744
申请日：2010-04-22
CPC分类号： G06F9/3863 , G06F9/3004 , G06F9/30087 , G06F9/3842 , G06F9/3857
摘要： The embodiments described in the instant application provide a system for generating checkpoints. In the described embodiments, while speculatively executing instructions with one or more checkpoints in use, upon detecting an occurrence of a predetermined operating condition or encountering a predetermined type of instruction, the system is configured to determine whether an additional checkpoint is to be generated by computing a factor based on one or more operating conditions of the processor. When the factor is greater than a predetermined value, the processor is configured to generate the additional checkpoint.
摘要翻译： 本申请中描述的实施例提供了一种用于生成检查点的系统。 在所描述的实施例中，当在使用中具有一个或多个检查点的推测执行指令时，在检测到预定操作条件的发生或遇到预定类型的指令时，该系统被配置为确定是否通过计算生成附加检查点 基于处理器的一个或多个操作条件的因素。 当因子大于预定值时，处理器被配置为生成附加检查点。
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37.发明申请公开(公告)号：US20110119528A1
公开(公告)日：2011-05-19
申请号：US12618282
申请日：2009-11-13
CPC分类号： G06F11/1405
摘要： The described embodiments provide a processor (e.g., processor 102) for executing instructions. During execution, the processor starts by transactionally executing instructions from a protected section of program code. The processor then encounters a transactional failure condition while transactionally executing the instructions from the protected section of program code. In response to encountering the transactional failure condition, the processor enters a transactional-scout mode and speculatively executes subsequent instructions in the transactional-scout mode.
摘要翻译： 所描述的实施例提供用于执行指令的处理器（例如，处理器102）。 在执行期间，处理器通过事先执行来自程序代码的受保护部分的指令来启动。 然后处理器在从程序代码的受保护部分事务地执行指令时遇到事务故障条件。 响应于遇到事务故障条件，处理器进入事务侦察模式并且在事务侦察模式中推测地执行后续指令。
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