WORD LINE ARCHITECTURE FOR THREE DIMENSIONAL NAND FLASH MEMORY

    公开(公告)号:US20210134828A1

    公开(公告)日:2021-05-06

    申请号:US16675800

    申请日:2019-11-06

    Abstract: A non-volatile memory apparatus is provided and includes a substrate having a major surface extending longitudinally. A stack of first and second sets of word lines and insulating layers extends along and over the major surface longitudinally and alternating with and overlying one another vertically to define a device region. The first and second sets of word lines each respectively extends longitudinally beyond a first and second side of the device region a decreasing longitudinal distance from the device region as a vertical distance from the major surface increases to define first and second stepped contact regions. Word line contacts extend vertically in the first and second stepped contact regions. The second set of word lines in the first stepped contact region do not contact the word line contacts and the first set of word lines in the second stepped contact region do not contact the word line contacts.

    State coding for fractional bits-per-cell memory

    公开(公告)号:US10910044B2

    公开(公告)日:2021-02-02

    申请号:US16146135

    申请日:2018-09-28

    Abstract: An apparatus includes a pair of memory cells configured to represent data using joint data states where one of the joint data states comprises an error-prone joint data state. The apparatus further includes an encoder configured to convert user data into joint data states according to a dual-cell gray-code encoding scheme in which the error-prone joint data state does not encode user data.

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