Abstract:
Provided are methods and compositions for use in therapy, and in particular for treating cancer, preferably drug-resistant cancer, and/or radiation resistant cancer. The compounds may be used for reducing tumor size in a mammalian subject and for inducing apoptosis in a tumor cell. The methods are effective on tumor cells that are resistant to drugs such as temozolomide, doxorubicin, and geldanamycin, as well as non-resistant tumor cells. Further provided are barbiturate and thiobarbiturates diene compounds for use in treating cancer, and uses, methods and compositions relating to these compounds.
Abstract:
The present invention relates to an apparatus and method for assisting parking, the apparatus including: an image sensor photographing front/rear view images of a vehicle; and an estimated trace of vehicle generation and process unit generating an estimated trace of the vehicle to a parking target area using steering angle information of the vehicle, and overlaying the estimated trace of the vehicle to the photographed front/rear view images of the vehicle, wherein the estimated trace of the vehicle includes a first estimated trace of the vehicle based on a rear wheel of the vehicle and a second estimated trace of the vehicle based on a front wheel of the vehicle.
Abstract:
A method of manufacturing a flexible piezoelectric device including laminating a first metal layer on a silicon oxide layer on a silicon substrate. The method further includes laminating a device on the first metal layer and annealing the first metal layer to oxidize the first metal into a first metal oxide. The method further includes etching the first metal oxide to separate the device from the silicon oxide layer and transferring the separated device to a flexible substrate using a transfer layer. The metal oxide layer laminated on the silicon substrate is etched to separate the device from the substrate. As a result, physical damage of the silicon substrate is prevented and a cost of using expensive single-crystal silicon substrate is reduced.
Abstract:
The present invention relates to a jig for processing the inner surface of an aluminum alloy Winston cone baffle having the thickness of a sheet through an ultra-precision machining, the jig having a shape identically corresponding to the outer shape of a Winston cone baffle having a can body shape made up of compound parabolic, and divided into an upper plate jig and a lower plate jig in formation, wherein the upper plate jig is divided in two, a left side jig and a right side jig, which are formed to correspond in shape and size so as to enable isolation or coupling to/from each other, and the inner surface of the Winston cone baffle attached inside the upper plate jig is made to enable ultra-precision machining at the cutting speed of 220 m/min-300 m/min, which enables the inner surface of the Winston cone baffle to process a slickenside having approximately 4 nm of surface roughness, and in particular, ultra-precision machining at surface roughness of Ra=2.32 nm in a processing condition of cutting speed at 260 m/min, cutting depth at 4 micrometer, and feeding speed at 1 mm/min, thereby enabling formation of a Winston cone baffle through low-cost ultra-precision machining.
Abstract:
An automatic exposure (AE) controlling device and method are provided. According to the method, an electric shutter (ES) value and an analog gain control (AGC) value can be calculated through a proportional integral control method according to a brightness value of an inputted image frame. Then, AE compensation on a present image frame can be performed using the calculated ES value and AGC value.
Abstract:
An insulated gate bipolar transistor according to an embodiment includes a first conductive type collector ion implantation area in a substrate; a second conductive type buffer layer, including a first segment buffer layer and a second segment buffer layer, on the first conductive collector ion implantation area; a first conductive type base area on the second conductive type buffer layer; a gate on the substrate at a side of the first conductive type base area; a second conductive type emitter ion implantation area in the first conductive type base area; an insulating layer on the gate; an emitter electrode electrically connected to the second conductive type emitter ion implantation area; and a collector electrode electrically connected to the first conductive collector ion implantation area. The first segment buffer layer can be aligned below a portion of the base area and can have a lower density of second conductive type ions than that of the second segment buffer layer adjacent the first segment buffer layer.
Abstract:
A method of manufacturing LED display is provided. The method provides a sacrificial substrate on which RGB LED device layers are formed, respectively. The method etches and patterns the LED device layer to manufacture RGB LED devices, respectively. The method removes the sacrificial substrate in a lower side of the LED device. The method contacts a stamping processor to the RGB LED devices to separate the RGB LED devices from the sacrificial substrate. The method transfers the LED device, which is attached to the stamping processor, to a receiving substrate.
Abstract:
A liquid crystal display device includes first and second substrates facing each other; gate lines and data lines formed on the first substrate such that the gate lines and the data lines intersect each other to define pixel regions; thin film transistors formed at respective intersections of the gate lines and the data lines; a black matrix layer formed on the second substrate such that the black matrix layer corresponds to a region other than the pixel regions; color filter layers extending in an extension direction of the data lines in respective pixel regions; a liquid crystal layer interposed between the first and second substrates; first column spacers formed on one of the first and second substrates such that each first column spacer corresponds to an associated one of the gate lines or to a channel region of an associated one of the thin film transistors to maintain a cell gap between the first and second substrate; and spacer patterns formed on one of the first and second substrates such that each spacer pattern corresponds to at least one of an associated one of the gate lines and an associated one of the data lines, thereby forming a first gap between the spacer pattern and the other substrate facing the spacer pattern, and reducing an amount of liquid crystals filled between the first and second substrates.
Abstract:
Provided are a method for manufacturing a flexible device, a flexible device, a flexible piezoelectric device and a flexible capacitor manufactured by the same, and a method for manufacturing a flexible sensor. A method for manufacturing a flexible device includes: laminating a first metal layer on a silicon oxide layer on a silicon substrate; laminating a device on the first metal layer; annealing the first metal layer to oxidize the first metal into a first metal oxide; etching the first metal oxide so as to separate the device from the silicon oxide layer; and transferring the separated device to a flexible substrate using a transfer layer. According to the disclosed method for manufacturing a flexible device, differently from the prior art where the silicon substrate itself is etched, the metal oxide layer laminated on the silicon substrate is etched to separate the device from the substrate. As a result, physical damage of the silicon substrate may be prevented and the cost of using the expensive single-crystal silicon substrate may be reduced.
Abstract:
Embodiments relate to a semiconductor device and a method of manufacturing the same. According to embodiments, a semiconductor device may include a gate insulating layer and a gate electrode formed on a semiconductor substrate with an isolation layer, a low-density junction region formed at both sides of the gate electrode, a patterned insulating layer formed while exposing a portion of the low-density junction region, and a high-density junction region formed beneath the exposed low-density junction region of the semiconductor substrate.