公开(公告)号：US20150213846A1

公开(公告)日：2015-07-30

申请号：US14602950

申请日：2015-01-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takashi NAKAGAWA ,  Takayuki IKEDA ,  Yoshiyuki KUROKAWA ,  Munehiro KOZUMA ,  Takeshi AOKI

IPC: G11C5/14 ,  G11C5/06

CPC classification number: G11C5/148 ,  G11C11/24 ,  G11C14/0054

Abstract: To provide a semiconductor device having a novel configuration, in which a malfunction and power consumption are reduced. A data holding circuit which includes a flipflop including first and second latch circuits and a shadow register including a nonvolatile memory portion; and a control signal generation circuit which generates a first control signal supplied to the first latch circuit and a second control signal supplied to the second latch circuit are included. The shadow register is a circuit which controls data saving or data restoring between the first and second latch circuits on the basis of a saving control signal or a restore control signal. The control signal generation circuit is a circuit which generates the first and second control signals at L level in a period during which data is saved or restored, on the basis of a clock signal, the saving control signal, and the restore control signal.

Abstract translation: 为了提供具有新颖结构的半导体器件，其中故障和功耗降低。 一种数据保持电路，包括包括第一和第二锁存电路的触发器和包括非易失性存储器部分的影子寄存器; 以及产生提供给第一锁存电路的第一控制信号和提供给第二锁存电路的第二控制信号的控制信号产生电路。 影子寄存器是基于保存控制信号或恢复控制信号来控制第一和第二锁存电路之间的数据保存或数据恢复的电路。 控制信号生成电路是在时钟信号，保存控制信号以及恢复控制信号的基础上，在保存或恢复数据的期间，以L电平生成第一和第二控制信号的电路。