公开(公告)号：US07595745B1

公开(公告)日：2009-09-29

申请号：US11836619

申请日：2007-08-09

申请人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

发明人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

IPC分类号： H03M1/00

CPC分类号： H03K3/356113

摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a switch selectively couples an output node to a first reference voltage when the output node is to be in a first state based on the control signal. A source-follower circuit having a current source establishes a second reference voltage. A logic circuit coupled to the switch and the source-follower circuit and having a logic gate selectively discharges, in accordance with the control signal, the output node to the second reference voltage when the output node is to transition from the first state to a second state.

摘要翻译： 在将具有第一范围的第一逻辑信号转换成具有第二范围的第二逻辑信号的电路中，当输出节点将基于控制的第一状态时，开关选择性地将输出节点耦合到第一参考电压 信号。 具有电流源的源极跟随器电路建立第二参考电压。 耦合到开关和源极跟随器电路并且具有逻辑门的逻辑电路在输出节点要从第一状态转变到第二状态时，根据控制信号将输出节点选择性地放电到第二参考电压 州。

公开(公告)号：US07511649B1

公开(公告)日：2009-03-31

申请号：US11846292

申请日：2007-08-28

申请人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal ,  Stefano Marchesi

发明人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal ,  Stefano Marchesi

IPC分类号： H03M1/66

CPC分类号： H03K17/6871 ,  H03K3/35613

摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second MOS transistor has a source coupled to the output node and a gate coupled to a bias voltage. A current source circuit selectively biases the second MOS transistor to act as part of a source-follower circuit when the output node is to be in a second state. Additionally, a memory circuit has an input coupled to the output node, and an output. The memory circuit is configured to temporarily store a Boolean value of the output node when the output node transitions from the first state to the second state. Further, a discharging circuit is coupled to the output node and a second reference voltage. The discharging circuit is configured to temporarily provide a discharging path between the output node and the second reference voltage when the output node is transitioning from the first state to the second state. The discharging circuit has a first input coupled to the output of the memory circuit and a second input coupled to a control signal. The control signal indicates that the output node is to transition from the first state to the second state.

摘要翻译： 在将具有第一范围的第一逻辑信号转换为具有第二范围的第二逻辑信号的电路中，当输出节点将处于该状态时，第一金属氧化物半导体（MOS）晶体管选择性地将输出节点耦合到第一参考电压 第一个状态 第二MOS晶体管具有耦合到输出节点的源极和耦合到偏置电压的栅极。 当输出节点处于第二状态时，电流源电路选择性地偏压第二MOS晶体管，以充当源跟随器电路的一部分。 另外，存储器电路具有耦合到输出节点的输入和输出。 存储器电路被配置为当输出节点从第一状态转换到第二状态时临时存储输出节点的布尔值。 此外，放电电路耦合到输出节点和第二参考电压。 放电电路被配置为当输出节点从第一状态转变到第二状态时临时提供输出节点与第二参考电压之间的放电路径。 放电电路具有耦合到存储器电路的输出的第一输入和耦合到控制信号的第二输入。 控制信号表示输出节点要从第一状态转换到第二状态。

公开(公告)号：US07068094B1

公开(公告)日：2006-06-27

申请号：US10802364

申请日：2004-03-16

申请人： Shafiq M. Jamal ,  Pierte Roo

发明人： Shafiq M. Jamal ,  Pierte Roo

IPC分类号： G05F1/10

CPC分类号： H02M3/07 ,  H02M2001/0045 ,  H02M2001/007 ,  H02M2001/009

摘要： Systems, methods and apparatus relating to electronic circuits and signal processing are provided. In one aspect, a circuit is provided that includes a charge-pump operable to supply an output voltage, and a current mirror in communication with the charge-pump. The current mirror is responsive to the output voltage of the charge pump, and is operable to output a relatively constant current and suppress noise from the output voltage.

摘要翻译： 提供了与电子电路和信号处理有关的系统，方法和装置。 在一个方面，提供一种电路，其包括可操作以提供输出电压的电荷泵和与电荷泵连通的电流镜。 电流镜响应于电荷泵的输出电压，并且可操作以输出相对恒定的电流并抑制来自输出电压的噪声。