公开(公告)号：US08970464B2

公开(公告)日：2015-03-03

申请号：US13601762

申请日：2012-08-31

申请人： Kingsuk Brahma ,  Saman Saeedi ,  Sang Y. Youn ,  Shafiq M Jamal ,  Taif A. Syed

发明人： Kingsuk Brahma ,  Saman Saeedi ,  Sang Y. Youn ,  Shafiq M Jamal ,  Taif A. Syed

IPC分类号： G09G3/36 ,  G01N27/04 ,  G06F17/00 ,  H01L21/28 ,  G09G3/00

CPC分类号： G01N27/045 ,  G06F17/00 ,  G09G3/006 ,  G09G3/36 ,  G09G3/3611 ,  H01L21/28

摘要： The present disclosure is directed to systems and methods for determining sheet resistance values in a liquid crystal display (LCD) panel. In certain embodiments, a system for determining sheet resistance values in an LCD panel may include a display driver integrated circuit (IC). The display driver IC may include a first switch coupled to a first input/output (I/O) pad and a second I/O pad such that the first I/O pad is configured to couple to a voltage source and the second I/O pad is configured to couple to a current source. The display driver IC may also include a second switch coupled to a third I/O pad and the second I/O pad such that the second switch has substantially the same geometry as the first switch and the third I/O pad is configured to couple to a thin-film transistor (TFT) layer of the display panel.

摘要翻译： 本公开涉及用于确定液晶显示（LCD）面板中的薄层电阻值的系统和方法。 在某些实施例中，用于确定LCD面板中的薄层电阻值的系统可以包括显示驱动器集成电路（IC）。 显示驱动器IC可以包括耦合到第一输入/输出（I / O）焊盘和第二I / O焊盘的第一开关，使得第一I / O焊盘被配置为耦合到电压源，并且第二I / O焊盘被配置为耦合到当前源。 显示驱动器IC还可以包括耦合到第三I / O焊盘和第二I / O焊盘的第二开关，使得第二开关具有与第一开关基本相同的几何形状，并且第三I / O焊盘被配置为耦合 涉及显示面板的薄膜晶体管（TFT）层。

公开(公告)号：US20130328846A1

公开(公告)日：2013-12-12

申请号：US13610703

申请日：2012-09-11

申请人： Shafiq M. Jamal ,  Hopil Bae ,  Sang Y. Youn ,  Wei H. Yao

发明人： Shafiq M. Jamal ,  Hopil Bae ,  Sang Y. Youn ,  Wei H. Yao

IPC分类号： G06F3/038

CPC分类号： G09G3/3225 ,  G06F1/3265 ,  G09G3/006 ,  G09G3/3648 ,  G09G2320/02 ,  G09G2320/0209 ,  G09G2320/0693 ,  G09G2330/12 ,  G09G2380/02 ,  Y02D10/153

摘要： Better performance can be provided for a display system that has semiconductor microelectronic components such as demultiplexors, gate line and data line drivers, and pixel switches formed on the display substrate, e.g., a glass substrate that constitutes part of an active matrix display panel. A constituent transistor of one of these microelectronic components, e.g., a pixel thin film transistor (TFT) that is part of a particular display element, may be characterized using a replica component that emulates the behavior of the component.

摘要翻译： 可以提供具有诸如解复用器，栅极线和数据线驱动器之类的半导体微电子部件的显示系统和形成在显示器基板上的像素开关（例如构成有源矩阵显示面板的一部分的玻璃基板）的更好的性能。 这些微电子部件之一的构成晶体管（例如，作为特定显示元件的一部分的像素薄膜晶体管（TFT））可以使用仿效部件的行为的复制部件来表征。

公开(公告)号：US20130328749A1

公开(公告)日：2013-12-12

申请号：US13592176

申请日：2012-08-22

申请人： Shafiq M. Jamal ,  Yafei Bi ,  Hopil Bae ,  Sang Y. Youn

发明人： Shafiq M. Jamal ,  Yafei Bi ,  Hopil Bae ,  Sang Y. Youn

IPC分类号： G09G3/20

CPC分类号： G09G3/3648 ,  G09G3/3677 ,  G09G2320/0285 ,  G09G2330/025 ,  G09G2330/12

摘要： A display is disclosed that includes a transparent substrate and a plurality of pixel transistors that are formed on the transparent substrate to generate an image for display. A transistor drive circuit is used to drive the pixel transistors to generate the image. The transistor drive circuit may include a gate driver. Further, a test circuit may be used to: adjust voltages that are applied by the gate driver to a pixel transistor; and determine the voltage of the gate driver when a current spike has occurred to the pixel transistor which causes the pixel transistor to turn on. Once this threshold voltage for the gate driver to turn on the pixel transistor has been determined, it may be stored in a storage device for future use by the gate driver. Other embodiments are also described and claimed.

摘要翻译： 公开了一种显示器，其包括透明基板和形成在透明基板上以产生用于显示的图像的多个像素晶体管。 晶体管驱动电路用于驱动像素晶体管以产生图像。 晶体管驱动电路可以包括栅极驱动器。 此外，测试电路可以用于：将由栅极驱动器施加的电压调整到像素晶体管; 并且当使像素晶体管导通的像素晶体管发生电流尖峰时，确定栅极驱动器的电压。 一旦栅极驱动器接通像素晶体管的阈值电压就被确定，它可能被存储在存储器件中以供门驱动器将来使用。 还描述和要求保护其他实施例。

公开(公告)号：US08089304B1

公开(公告)日：2012-01-03

申请号：US12613248

申请日：2009-11-05

申请人： Shafiq M. Jamal

发明人： Shafiq M. Jamal

IPC分类号： H03B19/00

CPC分类号： H03K23/68 ,  G06F7/68

摘要： Frequency division methods and circuits are provided for producing an output clock signal with a frequency related to the frequency of an input clock signal by a predetermined factor. The method and circuit rely on the input clock signal and on feedback from the output signal to produce an intermediate signal. The frequency of the intermediate signal is divided to produce the output clock signal. The method and circuit may be implemented using few circuit components. In an exemplary embodiment, the method and circuit may be used to produce an output clock signal with a frequency that is two-and-a-half times lower than the frequency of the input clock signal.

摘要翻译： 提供了分频方法和电路，用于产生具有与输入时钟信号的频率相关的频率的输出时钟信号预定因子。 该方法和电路依赖于输入时钟信号和来自输出信号的反馈以产生中间信号。 中间信号的频率被分频以产生输出时钟信号。 该方法和电路可以使用很少的电路部件来实现。 在示例性实施例中，该方法和电路可用于产生具有比输入时钟信号的频率低二分之二的频率的输出时钟信号。

公开(公告)号：US07629909B1

公开(公告)日：2009-12-08

申请号：US11836628

申请日：2007-08-09

申请人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

发明人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

IPC分类号： H03M1/00

CPC分类号： H03K19/00361 ,  H03K17/162 ,  H03M1/742

摘要： In a circuit to convert a voltage range of a control signal, a first switch selectively couples, based on the control signal, an output node to a first reference voltage when the output node is to be in a first state. A second switch selectively establishes, based on the control signal, a second reference voltage when the output node is to be in a second state, the second state being a logical complement of the first state. A feedback control loop is coupled to the output node to maintain the second reference voltage in response to voltage fluctuation at the output node. The feedback control loop includes a current mirror and a transistor coupled to the current mirror. The transistor is controlled by feedback from the output node to modify a biasing current established by the current mirror to thereby counteract the voltage fluctuation.

摘要翻译： 在转换控制信号的电压范围的电路中，当输出节点处于第一状态时，第一开关基于控制信号将输出节点选择性地耦合到第一参考电压。 当输出节点处于第二状态时，第二开关基于控制信号选择性地建立第二参考电压，第二状态是第一状态的逻辑补码。 反馈控制回路耦合到输出节点以响应于输出节点处的电压波动来维持第二参考电压。 反馈控制回路包括电流镜和耦合到电流镜的晶体管。 晶体管通过来自输出节点的反馈来控制，以修改由电流镜所建立的偏置电流，从而抵消电压波动。

公开(公告)号：US07609186B1

公开(公告)日：2009-10-27

申请号：US11836584

申请日：2007-08-09

申请人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

发明人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

IPC分类号： H03K19/094

CPC分类号： H03K19/018528

摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second transistor selectively discharges the output node toward a second reference voltage via a resistor when the output node is to transition from the first state to a second state, the second state being a logical complement of the first state. A source-follower circuit has a source follower output coupled to the output node and has a dynamic current source, the dynamic current source having a control input coupled to the resistor. A third transistor selectively couples the source follower output to the dynamic current source when the output node is to be in the second state.

摘要翻译： 在将具有第一范围的第一逻辑信号转换成具有第二范围的第二逻辑信号的电路中，当输出节点处于第一状态时，第一晶体管选择性地将输出节点耦合到第一参考电压。 当输出节点要从第一状态转变到第二状态时，第二晶体管通过电阻器选择性地将输出节点放电到第二参考电压，第二状态是第一状态的逻辑补码。 源跟随器电路具有耦合到输出节点并具有动态电流源的源极跟随器输出，动态电流源具有耦合到电阻器的控制输入。 当输出节点处于第二状态时，第三晶体管选择性地将源极跟随器输出耦合到动态电流源。

公开(公告)号：US07605608B1

公开(公告)日：2009-10-20

申请号：US11836571

申请日：2007-08-09

申请人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

发明人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

IPC分类号： H03K19/094

CPC分类号： H03K19/018521 ,  H03M1/742

摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A second MOS transistor selectively discharges the output node toward a second reference voltage when the output node is to transition from the first state to a second state, the second state a logical complement of the first state. An output of a source-follower circuit, having a current source, is coupled to the output node. A third MOS transistor selectively couples the current source of the source-follower circuit to the second reference voltage when the output node is to be in the second state.

摘要翻译： 在将具有第一范围的第一逻辑信号转换为具有第二范围的第二逻辑信号的电路中，当输出节点将处于该状态时，第一金属氧化物半导体（MOS）晶体管选择性地将输出节点耦合到第一参考电压 第一个状态 当输出节点从第一状态转变到第二状态时，第二MOS晶体管选择性地将输出节点放电到第二参考电压，第二状态是第一状态的逻辑补码。 具有电流源的源跟随器电路的输出耦合到输出节点。 当输出节点处于第二状态时，第三MOS晶体管将源极跟随器电路的电流源选择性地耦合到第二参考电压。

公开(公告)号：US08704605B1

公开(公告)日：2014-04-22

申请号：US13353852

申请日：2012-01-19

申请人： Dennis Sinitsky ,  Junshi Qiao ,  Shafiq M. Jamal ,  Tao Shui

发明人： Dennis Sinitsky ,  Junshi Qiao ,  Shafiq M. Jamal ,  Tao Shui

IPC分类号： H03B5/36

CPC分类号： H03B5/364 ,  H03B5/36 ,  H03B5/362 ,  H03B2200/0012 ,  H03B2200/0062

摘要： A resonant element driver circuit includes a NMOS transistor and a PMOS transistor that are configured to drive a resonant element. The resonant element driver circuit includes biasing circuitry that is configured to bias the PMOS transistor. The biasing circuitry receives a reference signal that is used to set the biasing on the PMOS transistor. The resonant element driver further includes mirror circuitry that tracks current flowing through the NMOS and PMOS transistors.

摘要翻译： 谐振元件驱动电路包括被配置为驱动谐振元件的NMOS晶体管和PMOS晶体管。 谐振元件驱动电路包括被配置为偏置PMOS晶体管的偏置电路。 偏置电路接收用于设置PMOS晶体管上的偏置的参考信号。 谐振元件驱动器还包括跟踪流过NMOS和PMOS晶体管的电流的反射镜电路。

公开(公告)号：US20130328852A1

公开(公告)日：2013-12-12

申请号：US13610717

申请日：2012-09-11

申请人： Shafiq M. Jamal ,  Hopil Bae ,  Sang Y. Youn ,  Wei H. Yao

发明人： Shafiq M. Jamal ,  Hopil Bae ,  Sang Y. Youn ,  Wei H. Yao

IPC分类号： G06F3/038

CPC分类号： G09G3/3225 ,  G09G3/3648 ,  G09G2320/0285 ,  G09G2320/029

摘要： Better performance can be provided for a display system that has semiconductor microelectronic components such as demultiplexors, gate line and data line drivers, and pixel switches formed on the display substrate, e.g., a glass substrate that constitutes part of an active matrix display panel. A threshold voltage of a constituent transistor of one of these microelectronic components, e.g., a pixel thin film transistor (TFT) that is part of a particular display element, may be measured using a replica component that emulates the behavior of the component.

摘要翻译： 可以提供具有诸如解复用器，栅极线和数据线驱动器之类的半导体微电子部件的显示系统和形成在显示器基板上的像素开关（例如构成有源矩阵显示面板的一部分的玻璃基板）的更好的性能。 这些微电子部件之一的构成晶体管的阈值电压，例如作为特定显示元件的一部分的像素薄膜晶体管（TFT），可以使用模拟部件的行为的复制部件来测量。

公开(公告)号：US07705635B1

公开(公告)日：2010-04-27

申请号：US11836635

申请日：2007-08-09

申请人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

发明人： Francesco Rezzi ,  Nicola Ghittori ,  Giovanni Antonio Cesura ,  Shafiq M. Jamal

IPC分类号： H03B1/00 ,  H03K3/00

CPC分类号： H03K3/35613

摘要： In a circuit to convert a first logic signal having a first range to a second logic signal having a second range, a first metal oxide semiconductor (MOS) transistor selectively couples an output node to a first reference voltage when the output node is to be in a first state. A source-follower circuit includes a current source and a source follower output, and the source follower output is coupled to the output node. A second MOS transistor selectively couples the source-follower circuit to a second reference voltage when the output node is to be in the second state.

摘要翻译： 在将具有第一范围的第一逻辑信号转换为具有第二范围的第二逻辑信号的电路中，当输出节点将处于该状态时，第一金属氧化物半导体（MOS）晶体管选择性地将输出节点耦合到第一参考电压 第一个状态 源跟随器电路包括电流源和源极跟随器输出，并且源极跟随器输出耦合到输出节点。 当输出节点处于第二状态时，第二MOS晶体管选择性地将源极跟随器电路耦合到第二参考电压。