公开(公告)号：US20190237262A1

公开(公告)日：2019-08-01

申请号：US16250848

申请日：2019-01-17

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Kunihiko NAGAOKA ,  Noriyuki CHIGIRA ,  Koichiro MORITA

IPC: H01G4/30 ,  H01G4/008 ,  H01G4/12

CPC classification number: H01G4/30 ,  H01G4/008 ,  H01G4/1227

Abstract: A multilayer ceramic capacitor includes: a ceramic multilayer structure having a structure in which each of a plurality of ceramic dielectric layers and each of a plurality of internal electrode layers are alternately stacked and are alternately exposed to two edge faces of the ceramic multilayer structure; and a pair of external electrodes that are formed on the two edge faces, wherein when an average value of insulation resistances of each pair of the internal electrode adjacent to each other in a stacking direction is IRave and a minimum value of the insulation resistances is IRmin, (IRave−IRmin)/IRave

公开(公告)号：US20170365408A1

公开(公告)日：2017-12-21

申请号：US15456991

申请日：2017-03-13

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro MORITA ,  Katsuya TANIGUCHI ,  Minoru RYU ,  Yoshiki IWAZAKI

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/1227 ,  H01G4/232 ,  H01G4/2325

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the pair external electrodes; a dielectric layer stacked on the first internal electrode and containing a ceramic material and the base metal; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the external electrodes, wherein a concentration of the base metal in each of five regions, which are equally divided regions of a region between locations 50 nm away from the first and second internal electrodes in a stacking direction between the first and second internal electrodes, is within ±20% of an average of the concentrations of the base metal in the five regions, and thicknesses of the first internal electrode and the second internal electrode are 0.2 μm or greater.

公开(公告)号：US20170365407A1

公开(公告)日：2017-12-21

申请号：US15456962

申请日：2017-03-13

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro MORITA ,  Minoru RYU ,  Katsuya TANIGUCHI ,  Yoshiki IWAZAKI

IPC: H01G4/30 ,  H01G4/012 ,  H01G4/12 ,  H01G4/232

CPC classification number: H01G4/30 ,  H01G4/012 ,  H01G4/1227 ,  H01G4/2325

Abstract: A multilayer ceramic capacitor includes: a pair of external electrodes; a first internal electrode containing a base metal and coupled to one of the external electrodes; a dielectric layer stacked on the first internal electrode and containing a ceramic material and the base metal; and a second internal electrode stacked on the dielectric layer, containing the base metal, and coupled to another one of the external electrodes, wherein a concentration of the base metal in each of five regions is within ±20% of an average of the concentrations of the base metal in the five regions, the five regions being obtained by dividing a region from a location 50 nm away from the first internal electrode of the dielectric layer to a location 50 nm away from the second internal electrode of the dielectric layer in a stacking direction between the first and second internal electrodes equally into five.

公开(公告)号：US20150310989A1

公开(公告)日：2015-10-29

申请号：US14791126

申请日：2015-07-02

Applicant: TAIYO YUDEN CO., LTD.

Inventor： Koichiro MORITA ,  Youichi MIZUNO

IPC: H01G4/12 ,  H01G4/30 ,  H01G4/012

CPC classification number: H01G4/12 ,  H01G4/012 ,  H01G4/1227 ,  H01G4/20 ,  H01G4/30

Abstract: A multi-layer ceramic capacitor is constituted by ceramic dielectric layers alternately laminated with conductive layers, wherein the ceramic dielectric layers are sintered in such a way that core-shell grains having a core-shell structure are mixed with uniform solid-solution grains resulting from uniform progression of the solid solution process. Such multi-layer ceramic capacitor is characterized in that the area ratio of the core-shell grains to all sintered grains constituting the ceramic dielectric layer is 5 to 15% and that the average grain size of all sintered grains including the core-shell grains and uniform solid-solution grains is 0.3 to 0.5 μm.

Abstract translation: 多层陶瓷电容器由交替层叠有导电层的陶瓷电介质层构成，其中陶瓷电介质层被烧结，使得具有核 - 壳结构的核 - 壳颗粒与均匀的固溶颗粒混合，由 固溶过程的均匀进展。 这种多层陶瓷电容器的特征在于，核 - 壳晶粒与构成陶瓷电介质层的所有烧结晶粒的面积比为5〜15％，所有烧结晶粒的平均粒径包括核 - 壳粒和 均匀的固溶颗粒为0.3-0.5μm。