公开(公告)号：US06707831B1

公开(公告)日：2004-03-16

申请号：US09510278

申请日：2000-02-21

Applicant: Eric S Fetzer ,  Rohit Bhatia ,  Mark Gibson

Inventor： Eric S Fetzer ,  Rohit Bhatia ,  Mark Gibson

IPC: H04J302

CPC classification number: G06F9/30141 ,  G06F9/3828

Abstract: A system and method are disclosed which allow unstored computed results to be accessed without the normal overhead associated with traditional data forwarding and bypass techniques. Through the use of multiplexers and bi-directional OR controllers the unstored data is readily accessible for use before it is stored in a register file. The circuitry used also allows bi-directional travel across a register file or bank as information is passed between the bi directional controllers used. Latches can also be used in the circuitry. Additionally, the features of the invention allow the required number of select signals fed to the multiplexers used to be reduced over conventional methods. These reductions are possible through circuitry disclosed herein.

Abstract translation: 公开了一种系统和方法，其允许在没有与传统数据转发和旁路技术相关联的常规开销的情况下访问未计算的计算结果。 通过使用多路复用器和双向OR控制器，未存储的数据在存储在寄存器文件中之前易于使用。 所使用的电路还允许在所使用的双向控制器之间通过信息通过寄存器文件或存储体双向行进。 电路中也可以使用锁存器。 此外，本发明的特征允许所馈送到多路复用器的所需数量的选择信号比常规方法减少。 这些减少可以通过本文公开的电路来实现。

公开(公告)号：US06618803B1

公开(公告)日：2003-09-09

申请号：US09510282

申请日：2000-02-21

Applicant: David P Hannum ,  Rohit Bhatia

Inventor： David P Hannum ,  Rohit Bhatia

IPC: G06F9312

CPC classification number: G06F9/3834 ,  G06F9/383 ,  G06F9/3842

Abstract: The present invention discloses a system and method for simultaneously identifying a most recent advanced load instruction employing a particular register and determining whether the instruction conflicts with a store instruction thereby requiring a recovery operation. Fully associative tables are advantageously employed for identifying the most recent load instruction, for comparing store instruction address information with addresses employed in advanced load instructions, and for logging a validity status associated with a register number. Parallel operation of load vs. check register numbers and load instruction and store instruction memory addresses conserves time and preferably enables a hit/miss determination for a particular check instruction to be completed in single machine cycle.

Abstract translation: 本发明公开了一种用于同时识别采用特定寄存器的最新高级加载指令并确定指令是否与存储指令冲突从而需要恢复操作的系统和方法。 用于识别最新加载指令的完全关联表有利于将存储指令地址信息与高级加载指令中采用的地址进行比较，以及用于记录与寄存器号相关联的有效性状态。 负载与检查寄存器编号和加载指令和存储指令存储器地址的并行操作节省了时间，并且优选地使特定检查指令的命中/错误确定在单个机器周期中完成。