公开(公告)号：US20030137861A1

公开(公告)日：2003-07-24

申请号：US10229337

申请日：2002-08-26

Applicant: STMicroelectronics Limited

Inventor： William Thies ,  Nicolas Froidevaux

IPC: G11C005/06

CPC classification number: H01L27/0207 ,  H01L23/5286 ,  H01L24/06 ,  H01L2224/05554 ,  H01L2224/06153

Abstract: A method of producing a semiconductor circuit is disclosed with an area saving in comparison to conventional circuit layouts. IO cells are arranged with a width multiplied by a factor, but with corresponding reduced height. ESD protection circuitry is included at a reduced rate in comparison to usual arrangements. The space saving is achieved by occupying a semiconductor area that would have been used by ESD circuitry with the IO circuitry. ESD protection is maintained but at different locations.

Abstract translation: 公开了一种制造半导体电路的方法，与常规电路布局相比，具有节省的面积。 IO单元被布置成宽度乘以因子，但具有相应减小的高度。 与常规安排相比，ESD保护电路以降低的速度被包括在内。 通过占用由ESD电路与IO电路一起使用的半导体区域来实现节省空间。 ESD保护保持在不同的位置。

公开(公告)号：US20020154636A1

公开(公告)日：2002-10-24

申请号：US10107602

申请日：2002-03-27

Applicant: STMicroelectronics Limited

Inventor： Tom Thomas

IPC: H04L012/28

CPC classification number: H04L63/0428 ,  H04L45/742

Abstract: A method of locating packet identifiers held in respective memory locations in a memory, the method comprising receiving a plurality of packets, each packet including a packet identifier, searching said memory locations in a sequence to compare an incoming packet identifier with packet identifiers stored in the memory until a match is found, incrementing one of a set of counters associated respectively with the memory locations, said incremented counter being the one associated with the memory location where the match packet identifier is held, and reading values of each of the counters and using said values to determine the sequence in which the memory locations are searched for subsequent incoming packet identifiers.

Abstract translation: 一种定位保存在存储器中的相应存储器位置中的分组标识符的方法，所述方法包括接收多个分组，每个分组包括分组标识符，在序列中搜索所述存储器位置，以将输入分组标识符与存储在 存储器，直到找到匹配，递增与存储器位置相关联的一组计数器中的一个计数器，所述递增计数器是与保持匹配分组标识符的存储器位置相关联的计数器，以及每个计数器的读取值并使用 所述值用于确定搜索存储器位置以用于后续传入分组标识符的顺序。