公开(公告)号：US11656712B2

公开(公告)日：2023-05-23

申请号：US16027477

申请日：2018-07-05

Applicant: SYNAPTICS INCORPORATED

Inventor： Tetsuo Tanemura ,  Shunsuke Araki

IPC: G06F3/041 ,  G06F3/044

CPC classification number: G06F3/0416 ,  G06F3/044 ,  G06F2203/04105 ,  G06F2203/04107

Abstract: An example a method of detecting a force applied to a side of an input device including sensor electrodes, the method including: detecting first capacitive responses corresponding to a first plurality of sensor electrodes disposed near the side of the input device; detecting second capacitive responses corresponding to a second plurality of sensor electrodes disposed near a center of the input device; and determining a magnitude of the force applied to the side of the input device based on at least one of: a number of the second capacitive responses satisfying a first threshold; or magnitudes of the second capacitive responses.

公开(公告)号：US11644895B1

公开(公告)日：2023-05-09

申请号：US17497781

申请日：2021-10-08

Applicant: Synaptics Incorporated

Inventor： Joseph Kurth Reynolds

IPC: G06F3/01 ,  G02B27/00 ,  G02B27/01 ,  G06T19/00

CPC classification number: G06F3/013 ,  G02B27/0093 ,  G02B27/0101 ,  G02B27/017 ,  G06F3/012 ,  G06T19/006 ,  G02B2027/0138

Abstract: This disclosure provides methods, devices, and systems for indicating an attentiveness of a user of a head-mounted display (HMD) device. The HMD device may include a camera configured to capture images of the surrounding environment, an electronic display configured to display the images captured by the camera, and one or more sensors configured to track a direction of gaze of the user. In some aspects, the HMD device may output an attention cue based on the images displayed on the electronic display and the user's direction of gaze. The attention cue may indicate an attentiveness of the user to a person or object in the surrounding environment. In some implementations, the attention cue may be output via an attention indicator disposed on an outer surface of the HMD device. In some other implementations, the attention cue may be output via a communication interface that communicates with another HMD device.

公开(公告)号：US11644862B2

公开(公告)日：2023-05-09

申请号：US17199786

申请日：2021-03-12

Applicant: Synaptics Incorporated

Inventor： Jeremy Roberson ,  David Sobel

IPC: G06F1/12

CPC classification number: G06F1/12

Abstract: A system and method for synchronizing multiple integrated circuit (IC) chips for an input device having a display device integrated with a capacitive sensing device. A first one of the IC chips is a master IC chip and a second one of the IC chips is a slave IC chip. The master IC chip is configured to transmit synchronization signals to and from the slave IC chip, such that capacitive frames are acquired by each of the IC chips at substantially the same time, the initiation of the sensing signals is synchronized for each of the IC chips and the clock signals of the slave IC chips are synchronized with the clock signal of the master IC chip.

公开(公告)号：US20230100358A1

公开(公告)日：2023-03-30

申请号：US17678645

申请日：2022-02-23

Applicant: Synaptics Incorporated

Inventor： Tomoo Minaki ,  Hirobumi Furihata ,  Takashi Nose ,  Akio Sugiyama

IPC: G09G3/20

Abstract: A display driver includes an image processing circuit and a driver circuit. The image processing circuit is configured to: receive input image data corresponding to an input image; generate first subpixel rendered data from a first part of the input image data for a first display region of a display panel using a first setting; and generate second subpixel rendered data from a second part of the input image data for a second display region of the display panel using a second setting different from the first setting. The first pixel layout is different than the second pixel layout. The driver circuit is configured to update the first display region of the display panel based at least in part on the first subpixel rendered data and update the second display region of the display panel based at least in part on the second subpixel rendered data.

公开(公告)号：US11601744B2

公开(公告)日：2023-03-07

申请号：US17338489

申请日：2021-06-03

Applicant: SYNAPTICS INCORPORATED

Inventor： Wensen Liu

IPC: H04R1/10

Abstract: An on-ear headphone includes an alignment structure extending into the user's concha to help the user to align the headset for optimal comfort and sound perception. The alignment minimizes sound leakage, optimizes audio playback, and improves active noise cancelation.

公开(公告)号：US11594964B2

公开(公告)日：2023-02-28

申请号：US17109087

申请日：2020-12-01

Applicant: SYNAPTICS INCORPORATED

Inventor： Jae Won Choi ,  Dan Shen ,  Balakishan Challa ,  Lorenzo Crespi ,  Ketankumar B. Patel

IPC: H02M3/157 ,  H02M1/00

Abstract: A circuit includes a controller circuit configured to receive an output voltage of a converter and adjust a switching frequency of the converter in response to a status of an output load and an output load sensing circuit configured to determine the status of the output load and provide the peak current to the controller circuit. The output load sensing circuit may include a first timer configured to provide a delayed first signal to a peak current control in response to the output load being a heavy load. A second timer may be configured to provide a delayed second signal to the peak current control in response to the output load being a light load. The peak current control may be configured to adjust a peak current based on the received first signal and the second signal and configured to provide the peak current to the controller circuit.

公开(公告)号：US20230031349A1

公开(公告)日：2023-02-02

申请号：US17381903

申请日：2021-07-21

Applicant: Synaptics Incorporated

Inventor： Karthikeyan SHANMUGA VADIVEL

IPC: G06T5/00 ,  G06T1/20 ,  G06T3/40 ,  G06N3/04 ,  G06N3/08

Abstract: This disclosure provides methods, devices, and systems for neural network inferencing. The present implementations more specifically relate to performing inferencing operations on high dynamic range (HDR) image data in a lossless manner. In some aspects, a machine learning system may receive a number (K) of bits of pixel data associated with an input image and subdivide the K bits into a number (M) of partitions based on a number (N) of bits in each operand operated on by an artificial intelligence (AI) accelerator, where N

公开(公告)号：US11558170B2

公开(公告)日：2023-01-17

申请号：US17536410

申请日：2021-11-29

Applicant: Synaptics Incorporated

Inventor： Jens Kristian Poulsen ,  Lorenzo Crespi

IPC: H04L7/033

Abstract: Disclosed herein are systems and methods for improved performance of phase-locked loop based clock generators, particularly in the context of wireless audio. A PLL clock generator includes a PLL core configured to receive a module reference clock provided by a communications module and generate a subsystem data clock corresponding to a module data clock of the communications module; and a data clock tracker module configured to receive the module data and subsystem data clocks and determine a corresponding data clock correction factor. The bandwidth of the PLL core may be dynamically changed thereby enabling both fast and very precise settling. The PLL core may use a low jitter frequency reference for the phase detector while an a synchronous and jitter-prone audio sample clock is used to ensure a mean frequency of the PLL core tracks the audio sample clock.

公开(公告)号：US11556212B2

公开(公告)日：2023-01-17

申请号：US17170074

申请日：2021-02-08

Applicant: Synaptics Incorporated

Inventor： Shinobu Nohtomi

IPC: G06F3/044 ,  G01R27/26 ,  G06F3/041 ,  H03K17/96

Abstract: A processing system includes a level shifter, a drive circuit, and a capacitive sensing circuit. The level shifter is configured to generate a first level-shifted output corresponding to a graylevel value and a second level-shifted output corresponding to capacitive sensing control data. The drive circuit is configured to generate an output voltage based at least in part on the first level-shifted output. The capacitive sensing circuit is configured to receive a resulting signal from a sensor electrode and generate, based at least in part on the second level-shifted output, a capacitive sensing output corresponding to the resulting signal.

公开(公告)号：US11531425B1

公开(公告)日：2022-12-20

申请号：US17564159

申请日：2021-12-28

Applicant: Synaptics Incorporated

Inventor： Guozhong Shen

IPC: G06F3/041 ,  H03M1/06 ,  G06F3/044

Abstract: A method for operating an input device, the method involving obtaining a number of non-sinusoidal transmitter signals with unique base frequencies, and selecting a sampling frequency of an analog-to-digital converter (ADC) such that a number of aliasing artifacts associated with higher harmonics of the non-sinusoidal transmitter signals is located at frequencies different from the base frequencies.