Abstract:
An image signal processor may include a sensor interface that includes a pixel defect preprocessing (PDP) component that performs an initial adjustment of pixel values for patterned defect pixels in raw pixel data captured by an image sensor. To adjust a patterned defect pixel, the PDP component may apply an interpolation technique to values in a gain lookup table according to the pixel's location in the image frame to determine the gain value for the pixel, and then apply the gain value to the pixel. The PDP component may provide the raw pixel data with the adjusted patterned defect pixels to two or more other modules for additional processing. The other modules may include an image processing pipeline that may detect other defective pixels in the raw pixel data and correct the patterned defect pixels and the other defective pixels, for example using a weighted combination of neighboring pixels.
Abstract:
An image processing pipeline may perform temporal filtering on independent color channels in image data. A filter weight may be determined for a given pixel received at a temporal filter. The filter weight may be determined for blending a value of a channel in a full color encoding of the given pixel with a value of the same channel for a corresponding pixel in a previously filtered reference image frame. In some embodiments, the filtering strength for the channel may be determined independent from the filtering strength of another channel in the full color encoding of the given pixel. Spatial filtering may be applied to a filtered version of the given pixel prior to storing the given pixel as part of a new reference image frame.
Abstract:
A system and method for producing a digital image. The method may compensate for cross-talk between adjacent pixels and reduce the effect of auto-focus elements integrated into a pixel array of an image sensor. A set of coefficients is obtained, where the set of coefficients represent a relative measurement between two or more pixels in the pixel array and may be obtained from a calibration operation. A predictive function is constructed based on the set of coefficients. A compensated pixel value for at least one pixel of the image sensor is calculated using the predictive function. A digital image is created based in part on the compensated value.
Abstract:
An input rescale module that performs cross-color correlated downscaling of sensor data in the horizontal and vertical dimensions. The module may perform a first-pass demosaic of sensor data, apply horizontal and vertical scalers to resample and downsize the data in the horizontal and vertical dimensions, and then remosaic the data to provide horizontally and vertically downscaled sensor data as output for additional image processing. The module may, for example, act as a front end scaler for an image signal processor (ISP). The demosaic performed by the module may be a relatively simple demosaic, for example a demosaic function that works on 3×3 blocks of pixels. The front end of module may receive and process sensor data at two pixels per clock (ppc); the horizontal filter component reduces the sensor data down to one ppc for downstream components of the input rescale module and for the ISP pipeline.
Abstract:
Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different operation modes. In a bin mode, the binner circuit may blend a subset of input pixel values to generate an output pixel quad. In a skip mode, the binner circuit may select one of the input pixel values as the output pixel pixel. The selection may be performed randomly to avoid aliasing. In a luminance mode, the binner circuit may take a weighted average of a subset of pixel values having different colors. In a color value mode, the binner circuit may select one of the colors in a subset of pixel values as an output pixel value.
Abstract:
Embodiments relate to a multi-mode demosaicing circuit able to receive and demosaic image data in a different raw image formats, such as Bayer raw image format and Quad Bayer raw image format. The multi-mode demosaicing circuit demosaics Quad Bayer image data by interpolating a green channel of the image data along each of a plurality of directions, generating a gradient of the image data along each of the plurality of directions, modifying the interpolated green channels based on respective gradients to generate full-resolution green channel image data, which is combined with red and blue image data to generate the demosaiced image data. Interpolation is performed for non-green pixels based on neighboring green pixels along a specified direction, modified by a residual value based upon values of one or more nearby same-color pixels and a correlation between values of the same-color pixels and neighboring green pixels.
Abstract:
In one implementation, a method includes obtaining an image. The method includes splitting the image to produce a high-frequency component image and a low-frequency component image. The method includes downsampling the low-frequency component image to generate a downsampled low-frequency component image. The method includes correcting color aberration of the downsampled low-frequency component image to generate a color-corrected downsampled low-frequency component image. The method includes upsampling the color-corrected downsampled low-frequency component image to generate a color-corrected low-frequency component image. The method includes combining the color-corrected low-frequency component image and the high-frequency component image to generate a color-corrected version of the image.
Abstract:
A foveated down sampling and correction (FDS-C) circuit for combined down sampling and correction of chromatic aberrations in images. The FDS-C circuit performs down sampling and interpolation of pixel values of a first subset of pixels of a color in a raw image using down sampling scale factors and first interpolation coefficients to generate first corrected pixel values for pixels of the color in a first corrected version of the raw image. The FDS-C circuit further performs interpolation of pixel values of a second subset of the pixels in the first corrected version using second interpolation coefficients to generate second corrected pixel values for pixels of the color in a second corrected version of the raw image. Pixels in the first subset are arranged in a first direction, pixels in the second subset are arranged in a second direction, and the down sampling scale factors vary along the first direction.
Abstract:
Embodiments relate to image signal processors (ISP) that include binner circuits that down-sample an input image. An input image may include a plurality of pixels. The output image of the binner circuit may include a reduced number of pixels. The binner circuit may include a plurality of different operation modes. In a bin mode, the binner circuit may blend a subset of input pixel values to generate an output pixel quad. In a skip mode, the binner circuit may select one of the input pixel values as the output pixel pixel. The selection may be performed randomly to avoid aliasing. In a luminance mode, the binner circuit may take a weighted average of a subset of pixel values having different colors. In a color value mode, the binner circuit may select one of the colors in a subset of pixel values as an output pixel value.
Abstract:
Embodiments relate to axial chromatic aberration (ACA) reduction of raw image data generated by image sensors. A chromatic aberration reduction circuit performs chromatic aberration reduction on the raw image data to correct the ACA in the full color images through sharpening that has been clamped to reduce sharpening overshoot.