Integrated circuit with multi-application image processing

    公开(公告)号:US12207002B2

    公开(公告)日:2025-01-21

    申请号:US18194249

    申请日:2023-03-31

    Abstract: In described examples, an integrated circuit includes first, second, third, and fourth image processing blocks, a data selection circuitry, and a pipeline memory. An input of the first image processing block receives raw image data. An input of the second image processing block is coupled to an output of the first image processing block. An input of the third image processing block is coupled to an output of the second image processing block. A first input of the data selection circuitry is coupled to an output of the first image processing block, and a second input of the data selection circuitry is coupled to an output of the second image processing block. A data input of the pipeline memory is coupled to an output of the data selection circuitry, and an output of the pipeline memory is coupled to an input of the fourth image processing block.

    Image processor, image processing method, and imaging device

    公开(公告)号:US12200372B2

    公开(公告)日:2025-01-14

    申请号:US18135301

    申请日:2023-04-17

    Abstract: An image processor according to the present disclosure includes: an image segmentation processing section to generate a plurality of first map data on the basis of first image map data including a plurality of pixel values, the plurality of first map data having arrangement patterns of pixel values different from each other and including pixel values located at positions different from each other; an interpolation processing section to generate a plurality of second map data by determining a pixel value at a position where no pixel value is present in each of the plurality of first map data with use of interpolation processing; and a synthesis processing section to generate third map data by generating, on the basis of pixel values at positions corresponding to each other in the plurality of second map data, a pixel value at a position corresponding to the positions.

    Color-infrared sensor with a low power binning readout mode

    公开(公告)号:US12184956B2

    公开(公告)日:2024-12-31

    申请号:US17388876

    申请日:2021-07-29

    Inventor: Zheng Yang

    Abstract: An imaging device includes a pixel array including a 4×4 grouping of pixel circuits. The 4×4 grouping of pixel circuits includes four rows and four columns of the pixel array. A plurality of bitlines includes a first bitline, a second bitline, a third bitline, and a fourth bitline. Each one of the first, second, third, and fourth bitlines is coupled to a respective four pixel circuits in the 4×4 grouping of pixel circuits. Each one of the first, second, third, and fourth bitlines is coupled to all four of the rows and to all four of the columns of the 4×4 grouping of pixel circuits.

    DETECTION DEVICE
    10.
    发明申请

    公开(公告)号:US20240430583A1

    公开(公告)日:2024-12-26

    申请号:US18752045

    申请日:2024-06-24

    Abstract: A detection device includes a light source, and an optical sensor comprising a plurality of photodiodes configured to output pixel data corresponding to a light intensity irradiating the photodiodes. The optical sensor is configured to capture a first image containing a plurality of pieces of first pixel data and a second image that contains a plurality of pieces of second pixel data and is more sensitive than the first image, the second pixel data having a gradation equal to or smaller than a predetermined threshold is selected in the second image, the first pixel data in an area corresponding to a deselected second pixel data is selected in the first image, and a composite image is generated based on the selected second pixel data and the selected first pixel data.

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