公开(公告)号：US08612379B2

公开(公告)日：2013-12-17

申请号：US10907161

申请日：2005-03-23

申请人： Victor Chan ,  Mark William Hubbard ,  Darshanand Khusial ,  Lev Mirlas

发明人： Victor Chan ,  Mark William Hubbard ,  Darshanand Khusial ,  Lev Mirlas

IPC分类号： G06F7/00

CPC分类号： G06Q30/0601 ,  G06Q30/06

摘要： A method, system, architecture and apparatus for deploying multiple e-commerce systems in a single computing platform. In accordance with the present invention, an e-commerce systems architecture can include an instantiable owning business logic component derived from an abstract business definition and one or more instantiable business element components configured for aggregation under the control of a business facility instance. The business facility instance can include a coupling to an instance of the owning business logic component. Finally, the architecture can include an instantiable partner business component derived from the abstract business definition. In particular, the instantiable partner business component can include a configuration for limited access to selected ones of the instantiable business element components aggregated under the control of the business facility instance.

摘要翻译： 用于在单个计算平台中部署多个电子商务系统的方法，系统，架构和装置。 根据本发明，电子商务系统架构可以包括从抽象业务定义导出的可实例拥有的业务逻辑组件和被配置用于在业务设施实例的控制下聚合的一个或多个可实例化业务元素组件。 业务设施实例可以包括与所拥有的业务逻辑组件的实例的耦合。 最后，架构可以包含从抽象业务定义派生的可实例化的伙伴业务组件。 特别地，可实例性的合作伙伴业务组件可以包括用于对在业务设施实例的控制下聚合的可实例化业务元素组件中的所选择的那些的有限访问的配置。

公开(公告)号：US08338245B2

公开(公告)日：2012-12-25

申请号：US12048994

申请日：2008-03-14

申请人： Jae Gon Lee ,  Jong Ho Yang ,  Victor Chan ,  Jun Jung Kim

发明人： Jae Gon Lee ,  Jong Ho Yang ,  Victor Chan ,  Jun Jung Kim

IPC分类号： H01L21/8238

CPC分类号： H01L29/7833 ,  H01L21/823807 ,  H01L21/823864 ,  H01L27/0629 ,  H01L27/092 ,  H01L29/165 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848

摘要： An integrated circuit system that includes: providing a substrate including a first region with a first device and a second device and a second region with a resistance device; configuring the first device, the second device, and the resistance device to include a first spacer and a second spacer; forming a stress inducing layer over the first region and the second region; processing at least a portion of the stress inducing layer formed over the first region to alter the stress within the stress inducing layer; and forming a third spacer adjacent the second spacer of the first device and the second device from the stress inducing layer.

摘要翻译： 一种集成电路系统，包括：提供包括具有第一装置的第一区域的基板和具有电阻装置的第二区域; 配置第一装置，第二装置和电阻装置以包括第一间隔件和第二间隔件; 在所述第一区域和所述第二区域上形成应力诱导层; 处理形成在第一区域上的应力诱导层的至少一部分，以改变应力诱导层内的应力; 以及从所述应力诱导层形成邻近所述第一器件和所述第二器件的第二间隔物的第三间隔物。

公开(公告)号：US08145717B2

公开(公告)日：2012-03-27

申请号：US11232474

申请日：2005-09-21

申请人： Andrew Mason ,  Victor Chan

发明人： Andrew Mason ,  Victor Chan

IPC分类号： G06F15/16

CPC分类号： H04L67/24 ,  H04L51/04 ,  H04L51/28 ,  H04L67/306

摘要： A telecommunications system includes a network; a plurality of client devices operably coupled to said network, said plurality of client devices adapted to set one or more time contact parameters for buddies on a contact list; and a presence server including a timer, and adapted to maintain a timing of time contacts for selected contacts responsive to said parameters.

摘要翻译： 电信系统包括网络; 多个客户机设备，可操作地耦合到所述网络，所述多个客户端设备适于为联系人列表上的伙伴设置一个或多个时间接触参数; 以及存在服务器，其包括定时器，并且适于响应于所述参数来维持所选择的联系人的时间联系的定时。

公开(公告)号：US07887757B2

公开(公告)日：2011-02-15

申请号：US11430178

申请日：2006-05-09

申请人： Victor Chan

发明人： Victor Chan

IPC分类号： B01L9/00

CPC分类号： G01N33/48757 ,  B65D83/0829 ,  B65D83/087 ,  B65H3/24 ,  G01N33/4875

摘要： An apparatus for storing and dispensing a test strip includes a container configured to store a stack of test strips. The container maintains appropriate environmental conditions, such as humidity, for storing the test strips. An engaging member is disposed in the container and is adapted to contact one test strip of the stack of test strips. An actuator actuates the engaging member to dispense the one test strip from the container. Since one test strip is dispensed at a time, the remaining test strips are not handled by the user. Accordingly, the unused test strips remain free of contaminants such as naturally occurring oils on the user's hand.

摘要翻译： 用于存储和分配测试条的设备包括被配置为存储测试条的堆叠的容器。 容器保持适当的环境条件，例如湿度，用于存放测试条。 接合构件设置在容器中并且适于接触测试条堆叠的一个测试条。 致动器致动接合构件以从容器分配一个测试条。 由于一次分配一个测试条，所以剩余的测试条不被用户处理。 因此，未使用的测试条保持没有污染物，例如用户手上的天然存在的油。

公开(公告)号：US20110000933A1

公开(公告)日：2011-01-06

申请号：US12923268

申请日：2010-09-13

申请人： Victor Chan ,  John Lovell

发明人： Victor Chan ,  John Lovell

IPC分类号： B65D83/08 ,  B01L3/00

CPC分类号： G01N33/48757 ,  B65D83/0829 ,  B65D83/087 ,  B65H3/24 ,  G01N33/4875

摘要： An apparatus for storing and dispensing a test strip includes a container configured to store a stack of test strips. The container maintains appropriate environmental conditions, such as humidity, for storing the test strips. An engaging member is disposed in the container and is adapted to contact one test strip of the stack of test strips. An actuator actuates the engaging member to dispense the one test strip from the container. Since one test strip is dispensed at a time, the remaining test strips are not handled by the user. Accordingly, the unused test strips remain free of contaminants such as naturally occurring oils on the user's hand.

公开(公告)号：US20080284462A1

公开(公告)日：2008-11-20

申请号：US12181566

申请日：2008-07-29

申请人： Victor Chan ,  Khee Yong Lim

发明人： Victor Chan ,  Khee Yong Lim

IPC分类号： G01R31/28

CPC分类号： G01R31/2648

摘要： Methods of characterizing a mechanical stress level in a stressed layer of a transistor and a mechanical stress characterizing test structure are disclosed. In one embodiment, the test structure includes a first test transistor including a first stress level; and at least one second test transistor having a substantially different second stress level. A testing circuit can then be used to characterize the mechanical stress level by comparing performance of the first test transistor and the at least one second test transistor. The type of test structure depends on the integration scheme used. In one embodiment, at least one second test transistor is provided with a substantially neutral stress level and/or an opposite stress level from the first stress level. The substantially neutral stress level may be provided by either rotating the transistor, removing the stressed layer causing the stress level or de-stressing the stressed layer causing the stress layer.

摘要翻译： 公开了在晶体管的应力层中表征机械应力水平的方法和机械应力表征测试结构。 在一个实施例中，测试结构包括包括第一应力水平的第一测试晶体管; 以及至少一个具有基本上不同的第二应力水平的第二测试晶体管。 然后可以通过比较第一测试晶体管和至少一个第二测试晶体管的性能来测试电路来表征机械应力水平。 测试结构的类型取决于所使用的集成方案。 在一个实施例中，至少一个第二测试晶体管具有与第一应力水平基本上中性的应力水平和/或相反的应力水平。 基本中性的应力水平可以通过旋转晶体管来提供，去除施加应力的应力层，或者使应力层的应力层解除应力层。

公开(公告)号：US07436169B2

公开(公告)日：2008-10-14

申请号：US11162295

申请日：2005-09-06

申请人： Victor Chan ,  Khee Yong Lim

发明人： Victor Chan ,  Khee Yong Lim

IPC分类号： G01R31/28

CPC分类号： G01R31/2648

摘要： Methods of characterizing a mechanical stress level in a stressed layer of a transistor and a mechanical stress characterizing test structure are disclosed. In one embodiment, the test structure includes a first test transistor including a first stress level; and at least one second test transistor having a substantially different second stress level. A testing circuit can then be used to characterize the mechanical stress level by comparing performance of the first test transistor and the at least one second test transistor. The type of test structure depends on the integration scheme used. In one embodiment, at least one second test transistor is provided with a substantially neutral stress level and/or an opposite stress level from the first stress level. The substantially neutral stress level may be provided by either rotating the transistor, removing the stressed layer causing the stress level or de-stressing the stressed layer causing the stress layer.

摘要翻译： 公开了在晶体管的应力层中表征机械应力水平的方法和机械应力表征测试结构。 在一个实施例中，测试结构包括包括第一应力水平的第一测试晶体管; 以及至少一个具有基本上不同的第二应力水平的第二测试晶体管。 然后可以通过比较第一测试晶体管和至少一个第二测试晶体管的性能来测试电路来表征机械应力水平。 测试结构的类型取决于所使用的集成方案。 在一个实施例中，至少一个第二测试晶体管具有基本上中性的应力水平和/或与第一应力水平相反的应力水平。 可以通过旋转晶体管来提供基本中性的应力水平，去除引起应力水平的应力层或者使施加应力层的应力层去应力。

公开(公告)号：US20080206958A1

公开(公告)日：2008-08-28

申请号：US12115731

申请日：2008-05-06

申请人： Victor Chan ,  Massimo V. Fischetti ,  John M. Hergenrother ,  Meikei Ieong ,  Rajesh Rengarajan ,  Alexander Reznicek ,  Paul M. Solomon ,  Chun-yung Sung ,  Min Yang

发明人： Victor Chan ,  Massimo V. Fischetti ,  John M. Hergenrother ,  Meikei Ieong ,  Rajesh Rengarajan ,  Alexander Reznicek ,  Paul M. Solomon ,  Chun-yung Sung ,  Min Yang

IPC分类号： H01L21/20

CPC分类号： H01L29/7842 ,  H01L21/823807 ,  H01L29/045 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7843 ,  H01L29/7846 ,  H01L29/78684

摘要： The present invention provides a semiconductor material that has enhanced electron and hole mobilities that comprises a Si-containing layer having a crystal orientation and a biaxial compressive strain. The term “biaxial compressive stress” is used herein to describe the net stress caused by longitudinal compressive stress and lateral stress that is induced upon the Si-containing layer during the manufacturing of the semiconductor material. Other aspect of the present invention relates to a method of forming the semiconductor material of the present invention. The method of the present invention includes the steps of providing a silicon-containing layer; and creating a biaxial strain in the silicon-containing layer.

摘要翻译： 本发明提供了具有增强的电子和空穴迁移率的半导体材料，其包含具有<110>晶体取向和双轴压缩应变的含Si层。 本文中使用的术语“双轴压应力”来描述在制造半导体材料期间由含Si层引起的纵向压应力和横向应力引起的净应力。 本发明的另一方面涉及形成本发明的半导体材料的方法。 本发明的方法包括提供含硅<110>层的步骤; 并在含硅<110>层中产生双轴应变。

公开(公告)号：US07396724B2

公开(公告)日：2008-07-08

申请号：US10907415

申请日：2005-03-31

申请人： Victor Chan ,  Haining S. Yang ,  Yong M. Lee ,  Eng H. Lim

发明人： Victor Chan ,  Haining S. Yang ,  Yong M. Lee ,  Eng H. Lim

IPC分类号： H01L21/8234

CPC分类号： H01L29/7843 ,  H01L21/76828 ,  H01L21/76829 ,  H01L21/76832 ,  H01L29/665 ,  H01L29/66575 ,  H01L29/78

摘要： Methods of fabricating a semiconductor device including a dual-hybrid liner in which an underlying silicide layer is protected from photoresist stripping chemicals by using a hard mask as a pattern during etching, rather than using a photoresist. The hard mask prevents exposure of a silicide layer to photoresist stripping chemicals and provides very good lateral dimension control such that the two nitride liners are well aligned.

摘要翻译： 制造包括双重混合衬垫的半导体器件的方法，其中通过在蚀刻期间使用硬掩模作为图案来保护底层硅化物层免受光致抗蚀剂剥离化学品，而不是使用光致抗蚀剂。 硬掩模防止硅化物层暴露于光致抗蚀剂剥离化学品，并提供非常好的横向尺寸控制，使得两个氮化物衬垫良好对准。

公开(公告)号：US20080154745A1

公开(公告)日：2008-06-26

申请号：US11614179

申请日：2006-12-21

申请人： Victor Chan ,  Ross McKegney ,  Jeffrey A. Shiner ,  Ramiah K. Tin ,  Jian Zhang

发明人： Victor Chan ,  Ross McKegney ,  Jeffrey A. Shiner ,  Ramiah K. Tin ,  Jian Zhang

IPC分类号： G06Q30/00

CPC分类号： G06Q30/0603 ,  G06Q30/0623 ,  G06Q30/0641

摘要： Embodiments of the present invention address deficiencies of the art in respect to catalog modeling for e-commerce systems and provide a method, system and computer program product for an adaptive unified retail catalog. In an embodiment of the invention, an e-commerce data processing system can be configured for catalog adaptation. The system can include an adaptive retail catalog, a logical catalog implementation of a logical catalog model coupled to the adaptive retail catalog, and a physical catalog coupled to the adaptive retail catalog through a database mediator. The system further includes a mapping of search requests against the logical catalog implementation to the physical catalog. In this way, changes to the underlying physical catalog model can be accommodated without requiring a companion change in the logical catalog model.

摘要翻译： 本发明的实施例解决了关于电子商务系统的目录建模方面的技术缺陷，并且提供了用于自适应统一零售目录的方法，系统和计算机程序产品。 在本发明的一个实施例中，电子商务数据处理系统可以被配置用于目录自适应。 系统可以包括自适应零售目录，耦合到自适应零售目录的逻辑目录模型的逻辑目录实现，以及通过数据库调解器耦合到自适应零售目录的物理目录。 该系统还包括将搜索请求与逻辑目录实现相关联到物理目录的映射。 以这种方式，可以适应对底层物理目录模型的更改，而无需在逻辑目录模型中进行随播更改。