公开(公告)号：US07011929B2

公开(公告)日：2006-03-14

申请号：US10340245

申请日：2003-01-09

Applicant: Ming-Ta Lei ,  Yih-Shung Lin ,  Ai-Sen Liu ,  Cheng-Chung Lin ,  Baw-Ching Perng ,  Chia-Hui Lin

Inventor： Ming-Ta Lei ,  Yih-Shung Lin ,  Ai-Sen Liu ,  Cheng-Chung Lin ,  Baw-Ching Perng ,  Chia-Hui Lin

IPC: H01L21/302

CPC classification number: H01L21/823468

Abstract: A method of forming pluralities of gate sidewall spacers each plurality comprising different associated gate sidewall spacer widths including providing a plurality of gate structures formed overlying a substrate and a plurality of dielectric layers formed substantially conformally overlying the gate structures; exposing a first selected portion of the plurality followed by anisotropically etching through a thickness portion comprising at least the uppermost dielectric layer to form a first sidewall spacer width; exposing a first subsequent selected portion of the plurality followed by etching through at least a thickness portion of the uppermost dielectric layer; and, exposing a second subsequent selected portion of the plurality followed by anisotropically etching through at least a thickness portion of the uppermost dielectric layer to form a subsequent sidewall spacer width.

Abstract translation: 一种形成多个栅极侧壁间隔物的方法，每个栅极侧壁间隔件包括不同的相关栅极侧壁间隔物宽度，包括提供形成在衬底上的多个栅极结构和基本上共形地覆盖栅极结构的多个电介质层; 暴露多个的第一选定部分，然后通过各向异性蚀刻穿过包括至少最上面的介电层的厚度部分以形成第一侧壁间隔物宽度; 暴露多个的第一后续选定部分，然后蚀刻通过至少最上层介电层的厚度部分; 并且暴露多个随后的第二部分，然后通过各向异性蚀刻穿过至少最上面的介电层的厚度部分以形成随后的侧壁间隔物宽度。

公开(公告)号：USD458054S1

公开(公告)日：2002-06-04

申请号：US29149416

申请日：2001-10-11

Applicant: Cheng-Chung Lin

Designer： Cheng-Chung Lin