公开(公告)号：US08609526B2

公开(公告)日：2013-12-17

申请号：US12842617

申请日：2010-07-23

Applicant: Chung-Shi Liu ,  Cheng-Chung Lin ,  Ming-Che Ho ,  Kuo Cheng Lin ,  Meng-Wei Chou

Inventor： Chung-Shi Liu ,  Cheng-Chung Lin ,  Ming-Che Ho ,  Kuo Cheng Lin ,  Meng-Wei Chou

IPC: H01L21/445 ,  H01L21/4757

CPC classification number: H01L24/05 ,  H01L21/0206 ,  H01L21/02068 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/81022 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

Abstract: A method of forming an integrated circuit structure includes forming a copper-containing seed layer on a wafer, and performing a descum step on an exposed surface of the copper-containing seed layer. The descum step is performed using a process gas including fluorine and oxygen. A reduction/purge step is then performed on the exposed surface of the copper-containing seed layer using a nitrogen-containing gas. A copper-containing layer is plated on the copper-containing seed layer.

Abstract translation: 形成集成电路结构的方法包括在晶片上形成含铜晶种层，并在含铜种子层的暴露表面上进行除氧步骤。 除氧步骤使用包括氟和氧的工艺气体进行。 然后使用含氮气体在含铜种子层的暴露表面上进行还原/吹扫步骤。 含铜层镀在含铜种子层上。

公开(公告)号：US08441124B2

公开(公告)日：2013-05-14

申请号：US12769768

申请日：2010-04-29

Applicant: Yi-Wen Wu ,  Cheng-Chung Lin ,  Chien Ling Hwang ,  Chung-Shi Liu

Inventor： Yi-Wen Wu ,  Cheng-Chung Lin ,  Chien Ling Hwang ,  Chung-Shi Liu

IPC: H01L23/48 ,  H01L23/52

CPC classification number: H01L23/49811 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/05023 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05541 ,  H01L2224/05568 ,  H01L2224/05582 ,  H01L2224/05611 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/05681 ,  H01L2224/05687 ,  H01L2224/10145 ,  H01L2224/11002 ,  H01L2224/1112 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11827 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13007 ,  H01L2224/13023 ,  H01L2224/13083 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13118 ,  H01L2224/1312 ,  H01L2224/13123 ,  H01L2224/13124 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/1317 ,  H01L2224/13171 ,  H01L2224/13181 ,  H01L2224/13551 ,  H01L2224/13561 ,  H01L2224/13565 ,  H01L2224/1357 ,  H01L2224/1358 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13664 ,  H01L2224/13686 ,  H01L2224/13687 ,  H01L2224/13688 ,  H01L2224/1369 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01038 ,  H01L2924/0104 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/05042 ,  H01L2924/05442 ,  H01L2924/0665 ,  H01L2924/07025 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/3841 ,  H01L2924/0105 ,  H01L2224/11 ,  H01L2924/01007 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/00 ,  H01L2224/05552

Abstract: A sidewall protection structure is provided for covering at least a portion of a sidewall surface of a bump structure, in which a protection structure on the sidewalls of a Cu pillar and a surface region of an under-bump-metallurgy (UBM) layer is formed of at least one non-metal material layers, for example a dielectric material layer, a polymer material layer, or combinations thereof.

Abstract translation: 提供了一种侧壁保护结构，用于覆盖凸块结构的侧壁表面的至少一部分，其中形成有Cu柱的侧壁上的保护结构和凸起下 - 冶金（UBM）层的表面区域 至少一个非金属材料层，例如介电材料层，聚合物材料层或其组合。

公开(公告)号：US08432259B2

公开(公告)日：2013-04-30

申请号：US12985762

申请日：2011-01-06

Applicant: Chun-Hui Huang ,  Hsien-Min Hsu ,  Cheng-Chung Lin ,  Chih-Lung Liu

Inventor： Chun-Hui Huang ,  Hsien-Min Hsu ,  Cheng-Chung Lin ,  Chih-Lung Liu

IPC: H04Q5/22 ,  G05B23/02 ,  G06Q10/00

CPC classification number: B65G1/1373 ,  B65G2203/046

Abstract: A picking system comprises a radio frequency identification (RFID) tag, a case, a two-wire conductive strip, at least one identifying unit and a processing unit. The two-wire conductive strip is electrically connected between the identifying unit and the processing unit. The identifying unit reads tag information within the RFID tag for actively and instantly controlling the authorization of an operating staff assigned for particular items thereby improving the accuracy of picking items.

Abstract translation: 拾取系统包括射频识别（RFID）标签，外壳，双线导电条，至少一个识别单元和处理单元。 两线导电带电连接在识别单元和处理单元之间。 识别单元读取RFID标签内的标签信息，主动地立即控制分配给特定物品的操作人员的授权，从而提高拾取物品的准确性。

公开(公告)号：US08227334B2

公开(公告)日：2012-07-24

申请号：US12843760

申请日：2010-07-26

Applicant: Ming-Da Cheng ,  Ming-Che Ho ,  Chung-Shi Liu ,  Chien Ling Hwang ,  Cheng-Chung Lin ,  Hui-Jung Tsai ,  Zheng-Yi Lim

Inventor： Ming-Da Cheng ,  Ming-Che Ho ,  Chung-Shi Liu ,  Chien Ling Hwang ,  Cheng-Chung Lin ,  Hui-Jung Tsai ,  Zheng-Yi Lim

IPC: H01L21/00

CPC classification number: H01L24/11 ,  H01L21/4853 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/93 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0345 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05181 ,  H01L2224/05187 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/11416 ,  H01L2224/11422 ,  H01L2224/11424 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/118 ,  H01L2224/1181 ,  H01L2224/1182 ,  H01L2224/11822 ,  H01L2224/11827 ,  H01L2224/11848 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/13005 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/132 ,  H01L2224/13211 ,  H01L2224/13339 ,  H01L2224/13562 ,  H01L2224/13584 ,  H01L2224/13611 ,  H01L2224/13644 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13664 ,  H01L2224/1379 ,  H01L2224/13794 ,  H01L2224/13809 ,  H01L2224/13813 ,  H01L2224/13817 ,  H01L2224/13818 ,  H01L2224/1382 ,  H01L2224/13849 ,  H01L2224/13855 ,  H01L2224/13857 ,  H01L2224/1386 ,  H01L2224/13866 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/81193 ,  H01L2224/81815 ,  H01L2224/93 ,  H01L2225/06513 ,  H01L2924/01012 ,  H01L2924/01013 ,  H01L2924/01025 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01051 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2224/11 ,  H01L2924/00

Abstract: A method of forming a device includes providing a substrate, and forming a solder bump over the substrate. A minor element is introduced to a region adjacent a top surface of the solder bump. A re-flow process is then performed to the solder bump to drive the minor element into the solder bump.

Abstract translation: 形成器件的方法包括提供衬底，以及在衬底上形成焊料凸点。 将次要元件引入邻近焊料凸块顶表面的区域。 然后对焊料凸块执行再流程以将次要元件驱动到焊料凸块中。

公开(公告)号：US20120088362A1

公开(公告)日：2012-04-12

申请号：US12901273

申请日：2010-10-08

Applicant: Chien Ling Hwang ,  Cheng-Chung Lin ,  Ying-Jui Huang ,  Chung-Shi Liu

Inventor： Chien Ling Hwang ,  Cheng-Chung Lin ,  Ying-Jui Huang ,  Chung-Shi Liu

IPC: H01L21/768

CPC classification number: H01L24/75 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/1605 ,  H01L2224/75302 ,  H01L2224/7531 ,  H01L2224/75312 ,  H01L2224/755 ,  H01L2224/75502 ,  H01L2224/7565 ,  H01L2224/75745 ,  H01L2224/81203 ,  H01L2224/81815 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  Y10T29/41 ,  H01L2924/00014 ,  H01L2924/00

Abstract: A method includes allowing a work piece having a solder bump to contact a bond head; heating the bond head until the solder bump is melted; and conducting a cooling media into the bond head to cool the solder bump and to solidify the solder bump.

Abstract translation: 一种方法包括允许具有焊料凸点的工件接触焊接头; 加热粘结头，直到焊料凸起熔化; 并将冷却介质导入接合头以冷却焊料凸点并固化焊料凸块。

公开(公告)号：US20120049346A1

公开(公告)日：2012-03-01

申请号：US12871565

申请日：2010-08-30

Applicant: Cheng-Chung Lin ,  Chung-Shi Liu ,  Meng-Wei Chou ,  Kuo Cheng Lin ,  Wen-Hsiung Lu ,  Chien Ling Hwang ,  Ying-Jui Huang ,  De-Yuan Lu

Inventor： Cheng-Chung Lin ,  Chung-Shi Liu ,  Meng-Wei Chou ,  Kuo Cheng Lin ,  Wen-Hsiung Lu ,  Chien Ling Hwang ,  Ying-Jui Huang ,  De-Yuan Lu

IPC: H01L23/498 ,  H01L21/768

CPC classification number: H01L24/11 ,  H01L21/02052 ,  H01L21/32125 ,  H01L21/76873 ,  H01L21/76885 ,  H01L23/488 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2221/1084 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05073 ,  H01L2224/05541 ,  H01L2224/05573 ,  H01L2224/1111 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/11472 ,  H01L2224/11474 ,  H01L2224/11614 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/11903 ,  H01L2224/1191 ,  H01L2224/11912 ,  H01L2224/13005 ,  H01L2224/13017 ,  H01L2224/13018 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/13111 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13164 ,  H01L2224/81191 ,  H01L2924/00013 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01059 ,  H01L2924/01072 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/0541 ,  H01L2924/07025 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/20102 ,  H01L2924/3512 ,  H01L2924/381 ,  H01L2924/3841 ,  H01L2924/0105 ,  H01L2924/00014 ,  H01L2224/13099 ,  H01L2924/207

Abstract: Apparatus and methods for providing solder pillar bumps. Pillar bump connections are formed on input/output terminals for integrated circuits by forming a pillar of conductive material using plating of a conductive material over terminals of an integrated circuit. A base portion of the pillar bump has a greater width than an upper portion. A cross-section of the base portion of the pillar bump may make a trapezoidal, rectangular or sloping shape. Solder material may be formed on the top surface of the pillar. The resulting solder pillar bumps form fine pitch package solder connections that are more reliable than those of the prior art.

Abstract translation: 用于提供焊料柱凸块的装置和方法。 通过在集成电路的端子上通过导电材料的电镀形成导电材料的支柱，在集成电路的输入/输出端子上形成支柱凸点连接。 柱状凸块的基部具有比上部更大的宽度。 柱形凸起的基部的横截面可以形成梯形，矩形或倾斜的形状。 焊料可以形成在柱的顶表面上。 所得到的焊料柱凸起形成比现有技术更可靠的细间距封装焊接连接。

公开(公告)号：US20120038466A1

公开(公告)日：2012-02-16

申请号：US12985762

申请日：2011-01-06

Applicant: Chun-Hui HUANG ,  Hsien-Min Hsu ,  Cheng-Chung Lin ,  Chih-Lung Liu

Inventor： Chun-Hui HUANG ,  Hsien-Min Hsu ,  Cheng-Chung Lin ,  Chih-Lung Liu

IPC: H04Q5/22

CPC classification number: B65G1/1373 ,  B65G2203/046

Abstract: A picking system comprises a radio frequency identification (RFID) tag, a case, a two-wire conductive strip, at least one identifying unit and a processing unit. The two-wire conductive strip is electrically connected between the identifying unit and the processing unit. The identifying unit reads tag information within the RFID tag for actively and instantly controlling the authorization of an operating staff assigned for particular items thereby improving the accuracy of picking items.

Abstract translation: 拾取系统包括射频识别（RFID）标签，外壳，双线导电条，至少一个识别单元和处理单元。 两线导电带电连接在识别单元和处理单元之间。 识别单元读取RFID标签内的标签信息，主动地立即控制分配给特定物品的操作人员的授权，从而提高拾取物品的准确性。

公开(公告)号：US20120007230A1

公开(公告)日：2012-01-12

申请号：US12832168

申请日：2010-07-08

Applicant: Chien Ling Hwang ,  Ying-Jui Huang ,  Zheng-Yi Lim ,  Yi-Yang Lei ,  Cheng-Chung Lin ,  Chung-Shi Liu

Inventor： Chien Ling Hwang ,  Ying-Jui Huang ,  Zheng-Yi Lim ,  Yi-Yang Lei ,  Cheng-Chung Lin ,  Chung-Shi Liu

IPC: H01L23/498 ,  H01L21/3205

CPC classification number: H01L24/13 ,  H01L21/563 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/16 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/0346 ,  H01L2224/03464 ,  H01L2224/0361 ,  H01L2224/03831 ,  H01L2224/03912 ,  H01L2224/03914 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05647 ,  H01L2224/1132 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11622 ,  H01L2224/11831 ,  H01L2224/11849 ,  H01L2224/11901 ,  H01L2224/13007 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/81801 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01072 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10329 ,  H01L2924/14 ,  H01L2924/3512 ,  H01L2224/05552 ,  H01L2924/00 ,  H01L2224/1146

Abstract: An embodiment of the disclosure includes a conductive bump on a semiconductor die. A substrate is provided. A bond pad is over the substrate. An under bump metallurgy (UBM) layer is over the bond pad. A copper pillar is over the UBM layer. The copper pillar has a top surface with a first width and sidewalls with a concave shape. A nickel layer having a top surface and a bottom surface is over the top surface of the copper pillar. The bottom surface of the nickel layer has a second width. A ratio of the second width to the first width is between about 0.93 to about 1.07. A solder material is over the top surface of the cap layer.

Abstract translation: 本公开的实施例包括半导体管芯上的导电凸块。 提供基板。 焊盘在衬底上。 凸块下金属（UBM）层位于焊盘上方。 铜柱在UBM层之上。 铜柱具有第一宽度的顶表面和具有凹形的侧壁。 具有顶表面和底表面的镍层在铜柱的顶表面之上。 镍层的底面具有第二宽度。 第二宽度与第一宽度的比率在约0.93至约1.07之间。 焊料材料在盖层的顶表面之上。

公开(公告)号：US20110092064A1

公开(公告)日：2011-04-21

申请号：US12842617

申请日：2010-07-23

Applicant: Chung-Shi Liu ,  Cheng-Chung Lin ,  Ming-Che Ho ,  Kuo Cheng Lin ,  Meng-Wei Chou

Inventor： Chung-Shi Liu ,  Cheng-Chung Lin ,  Ming-Che Ho ,  Kuo Cheng Lin ,  Meng-Wei Chou

IPC: H01L21/3205

CPC classification number: H01L24/05 ,  H01L21/0206 ,  H01L21/02068 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/0346 ,  H01L2224/0347 ,  H01L2224/0361 ,  H01L2224/0381 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/05124 ,  H01L2224/05139 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05655 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/81022 ,  H01L2224/94 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01018 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/04953 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2224/11 ,  H01L2224/13099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/05099 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

Abstract: A method of forming an integrated circuit structure includes forming a copper-containing seed layer on a wafer, and performing a descum step on an exposed surface of the copper-containing seed layer. The descum step is performed using a process gas including fluorine and oxygen. A reduction/purge step is then performed on the exposed surface of the copper-containing seed layer using a nitrogen-containing gas. A copper-containing layer is plated on the copper-containing seed layer.

Abstract translation: 形成集成电路结构的方法包括在晶片上形成含铜晶种层，并在含铜种子层的暴露表面上进行除氧步骤。 除氧步骤使用包括氟和氧的工艺气体进行。 然后使用含氮气体在含铜种子层的暴露表面上进行还原/吹扫步骤。 含铜层镀在含铜种子层上。

公开(公告)号：US07176137B2

公开(公告)日：2007-02-13

申请号：US10435009

申请日：2003-05-09

Applicant: Baw-Ching Perng ,  Yih-Shung Lin ,  Ming-Ta Lei ,  Ai-Sen Liu ,  Chia-Hui Lin ,  Cheng-Chung Lin

Inventor： Baw-Ching Perng ,  Yih-Shung Lin ,  Ming-Ta Lei ,  Ai-Sen Liu ,  Chia-Hui Lin ,  Cheng-Chung Lin

IPC: H01L21/302

CPC classification number: H01L29/6656 ,  H01L21/823468

Abstract: A method of forming pluralities of gate sidewall spacers each plurality comprising different associated gate sidewall spacer widths including providing a first plurality of gate structures; blanket depositing a first dielectric layer over the first plurality of gate structures; blanket depositing a second dielectric layer over the first dielectric layer; etching back through a thickness of the first and second dielectric layers; blanket depositing a first photoresist layer to cover the first plurality and patterning to selectively expose at least a second plurality of gate structures; isotropically etching the at least a second plurality of gate structures for a predetermined time period to selectively etch away a predetermined portion of the first dielectric layer; and, selectively etching away the second dielectric layer to leave gate structures comprising a plurality of associated sidewall spacer widths.

Abstract translation: 形成多个栅极侧壁间隔物的方法，每个栅极侧壁间隔件包括不同的相关栅极侧壁间隔物宽度，包括提供第一多个栅极结构; 在第一多个栅极结构上覆盖沉积第一介电层; 在第一介电层上铺设第二介电层; 通过第一和第二介电层的厚度回蚀; 覆盖沉积第一光致抗蚀剂层以覆盖第一多个并且图案化以选择性地暴露至少第二多个栅极结构; 对所述至少第二多个栅极结构进行各向同性蚀刻预定的时间段以选择性地蚀刻掉所述第一介电层的预定部分; 并且选择性地蚀刻掉第二介电层以留下包括多个相关联的侧壁间隔物宽度的栅极结构。