公开(公告)号：US07303958B2

公开(公告)日：2007-12-04

申请号：US11728504

申请日：2007-03-26

申请人： Cheol Mo Jeong

发明人： Cheol Mo Jeong

IPC分类号： H01L21/336

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11543 ,  H01L29/42324 ,  H01L29/7842

摘要： Disclosed herein is a semiconductor device and method of manufacturing the same. A step between a memory cell formed in a cell region and a transistor formed in a peripheral circuit region is minimized, and the height of a gate in the memory cell is minimized. Accordingly, subsequent processes are facilitated and the electrical property of the device is thus improved.

公开(公告)号：US06656793B2

公开(公告)日：2003-12-02

申请号：US10306083

申请日：2002-11-27

申请人： Cheol Mo Jeong ,  Pyeng Geun Sohn

发明人： Cheol Mo Jeong ,  Pyeng Geun Sohn

IPC分类号： H01L21336

CPC分类号： H01L27/11521 ,  H01L21/28273 ,  H01L27/115

摘要： A method of forming a self-aligned floating gate in a flash memory cell. A capping layer is formed on a trench insulating film. An etching process is then performed to etch the trench insulating film to a desired dimension. Therefore, generation of a moat in the trench insulating film is avoided. Further, spacing of a floating gate formed in a subsequent process can be minimized.