公开(公告)号：US07460395B1

公开(公告)日：2008-12-02

申请号：US11159447

申请日：2005-06-22

申请人： Hyun-Jin Cho ,  Farid Nemati

发明人： Hyun-Jin Cho ,  Farid Nemati

IPC分类号： G11C11/39

CPC分类号： G11C11/39

摘要： A new memory cell can contain only a single thyristor. There is no need to include an access transistor in the cell. In one embodiment, the thyristor is a thin capacitively coupled thyristor. The new memory cell can be connected to word, bit, and control lines in several ways to form different memory arrays. Timing and voltage levels of word, bit and control lines are disclosed.

摘要翻译： 新的存储单元只能包含一个晶闸管。 不需要在电池中包括存取晶体管。 在一个实施例中，晶闸管是薄电容耦合晶闸管。 新的存储单元可以以多种方式连接到字，位和控制线，以形成不同的存储器阵列。 公开了字，位和控制线的时序和电压电平。

公开(公告)号：US20080012051A1

公开(公告)日：2008-01-17

申请号：US11615982

申请日：2006-12-24

申请人： Hyun-Jin Cho

发明人： Hyun-Jin Cho

IPC分类号： H01L29/80

CPC分类号： H01L27/1021 ,  G11C11/404 ,  G11C2211/4016 ,  H01L27/108 ,  H01L27/1203

摘要： A memory cell and methods of making and operating the same are provided. In one aspect, a method of forming a memory cell is provided that includes forming a MOS transistor that has a gate, a source region and a drain region. A bipolar transistor is formed that has a collector, a base and an emitter. The emitter of the bipolar transistor is formed to serve as the source region for the MOS transistor and the base of the bipolar transistor is formed to serve as a capacitive charge storage region for the memory cell.

摘要翻译： 提供了一种存储单元及其制作和操作方法。 一方面，提供一种形成存储单元的方法，包括形成具有栅极，源极区和漏极区的MOS晶体管。 形成具有集电极，基极和发射极的双极晶体管。 双极晶体管的发射极被形成为用于MOS晶体管的源极区域，并且双极晶体管的基极形成为用作存储器单元的电容电荷存储区域。

公开(公告)号：US06653175B1

公开(公告)日：2003-11-25

申请号：US10231805

申请日：2002-08-28

申请人： Farid Nemati ,  Hyun-Jin Cho ,  Scott Robins

发明人： Farid Nemati ,  Hyun-Jin Cho ,  Scott Robins

IPC分类号： H01L21332

CPC分类号： G11C11/39 ,  H01L29/7436 ,  H01L29/749

摘要： A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween. In connection with an example embodiment, it has been discovered that shunting current in this manner improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.

摘要翻译： 具有基于晶闸管的存储器件的半导体器件在与温度，噪声，电扰动和光线相关的不利操作条件下表现出改进的稳定性。 在本发明的一个具体示例实施例中，半导体器件包括基于晶闸管的存储器件，其使用在晶闸管中产生漏电流的分流器。 晶闸管包括电容耦合控制端口和阳极和阴极端部分。 每个端部具有发射极区域和相邻的基极区域。 在一个实施方案中，电流分流器位于晶闸管的一个端部的发射极和基极区域之间，并且被配置和布置成在它们之间分流低电平电流。 结合示例性实施例，已经发现，以这种方式分流电流提高了器件在不利条件下操作的能力，这种不利条件将在不存在分流的情况下导致无意中导通，同时保持存储器件的待机电流 达到可接受的低水平。

公开(公告)号：US06653174B1

公开(公告)日：2003-11-25

申请号：US10023052

申请日：2001-12-17

申请人： Hyun-Jin Cho ,  Andrew Horch ,  Scott Robins ,  Farid Nemati

发明人： Hyun-Jin Cho ,  Andrew Horch ,  Scott Robins ,  Farid Nemati

IPC分类号： H01L21332

CPC分类号： H01L29/74 ,  G11C11/39 ,  H01L27/0617 ,  H01L27/0688 ,  H01L27/1023 ,  H01L27/1027 ,  H01L27/11 ,  H01L27/1104 ,  H01L29/41716 ,  H01L29/42308 ,  H01L29/749 ,  H01L29/87

摘要： A semiconductor device having a thyristor is manufactured in a manner that reduces or eliminates manufacturing difficulties commonly experienced in the formation of such devices. According to an example embodiment of the present invention, a thyristor is formed having some or all of the body of the thyristor extending above a substrate surface of a semiconductor device. The semiconductor device includes at least one transistor having source/drain regions formed in the substrate prior to the formation of the thyristor. One or more layers of material are deposited on the substrate surface and used to form a portion of a body of the thyristor that includes anode and cathode end portions. Each end portion is formed having a base region and an emitter region, and at least one of the end portions includes a portion that is in the substrate and electrically coupled to the transistor. A control port is formed capacitively coupled to at least one of the base regions.

摘要翻译： 制造具有晶闸管的半导体器件以减少或消除在形成这些器件时通常经历的制造困难的方式。 根据本发明的示例性实施例，形成了晶闸管，其中半导体器件的衬底表面上方延伸有晶闸管的一部分或全部。 半导体器件包括至少一个晶体管，其在形成晶闸管之前在衬底中形成有源/漏区。 一层或多层材料沉积在衬底表面上，并用于形成包括阳极和阴极端部的晶闸管体的一部分。 每个端部形成为具有基极区域和发射极区域，并且至少一个端部部分包括位于衬底中并电耦合到晶体管的部分。 形成电容耦合到至少一个基极区域的控制端口。