公开(公告)号：US20190306923A1

公开(公告)日：2019-10-03

申请号：US16446320

申请日：2019-06-19

Applicant: Intel Corporation

Inventor： Gang Xiong ,  Yushu Zhang ,  Dae Won Lee ,  Alexei Vladimirovich Davydov ,  Seunghee Han ,  Jie Zhu ,  Dmitry Belov ,  Debdeep Chatterjee ,  Andrey Chervyakov ,  Fatemeh Hamidi-Sepehr ,  Hong He ,  Toufiqul Islam ,  Jeongho Jeon ,  Alexey Vladimirovich Khoryaev ,  Lopamudra Kundu ,  Yongjun Kwak ,  Jose Armando Oviedo ,  Sergey Panteleev ,  Mikhail Shilov ,  Sergey Sosnin ,  Salvatore Talarico ,  Jan Zaleski

IPC: H04W88/06 ,  H04W76/27 ,  H04L27/26 ,  H04J13/00 ,  H04L5/00 ,  H04W72/04

Abstract: A user equipment (UE) can include processing circuitry coupled to memory. To configure the UE for New Radio (NR) communications above a 52.6 GHz carrier frequency, the processing circuitry is to decode radio resource control (RRC) signaling to obtain a cyclic shift value in time domain. The cyclic shift value is associated with a demodulation reference signal (DM-RS) antenna port (AP) of a plurality of available DM-RS APs. A single carrier based waveform DM-RS sequence corresponding to the DM-RS AP is generated using a base sequence and the cyclic shift value. The single carrier based waveform DM-RS sequence is encoded with uplink data for transmission to a base station using a physical uplink shared channel (PUSCH) using a carrier above the 52.6 GHz carrier frequency.