公开(公告)号：US20210250977A1

公开(公告)日：2021-08-12

申请号：US17242560

申请日：2021-04-28

Applicant: Intel Corporation

Inventor： Gang Xiong ,  Avik Sengupta ,  Alexei Davydov ,  Dae Won Lee ,  Yingyang Li ,  Salvatore Talarico

IPC: H04W72/12 ,  H04W72/04 ,  H04L5/00

Abstract: A generation node B (gNB) for a fifth-generation (5G) new radio (NR) or a sixth-generation (6G) network is configured for slot-less operation at frequencies above a 52.6 GHz carrier frequency. The gNB may generate signalling to configure a user equipment (UE) with a gap between demodulation reference signal (DMRS) symbols for an associated physical downlink shared channel (PDSCH). The gNB may also encode the DMRS symbols for transmission in accordance with the gap and may encode the associated PDSCH for transmission during the gap between the DMRS symbol transmissions at symbol times following the DMRS symbols.

公开(公告)号：US20210212100A1

公开(公告)日：2021-07-08

申请号：US17193090

申请日：2021-03-05

Applicant: Intel Corporation

Inventor： Gang Xiong ,  Yingyang Li ,  Salvatore Talarico ,  Dae Won Lee

IPC: H04W72/12 ,  H04L1/18 ,  H04L27/26

Abstract: A generation Node B (gNB) configured for operating in a fifth generation (5G) system encodes a downlink control information (DCI) for transmission to a user equipment (UE). For slot-less operation the DCI may indicate a set of values for a data channel scheduling gap and hybrid automatic repeat request—acknowledgement (HARQ-ACK) timing. The set of values may be defined for a symbol group including one or more symbols. The gNB may encode the data channel for transmission based on the one or more values. The data channel may be transmitted on the symbol group with slot-less operation and using a subframe or frame for reference timing.

公开(公告)号：US20190306923A1

公开(公告)日：2019-10-03

申请号：US16446320

申请日：2019-06-19

Applicant: Intel Corporation

Inventor： Gang Xiong ,  Yushu Zhang ,  Dae Won Lee ,  Alexei Vladimirovich Davydov ,  Seunghee Han ,  Jie Zhu ,  Dmitry Belov ,  Debdeep Chatterjee ,  Andrey Chervyakov ,  Fatemeh Hamidi-Sepehr ,  Hong He ,  Toufiqul Islam ,  Jeongho Jeon ,  Alexey Vladimirovich Khoryaev ,  Lopamudra Kundu ,  Yongjun Kwak ,  Jose Armando Oviedo ,  Sergey Panteleev ,  Mikhail Shilov ,  Sergey Sosnin ,  Salvatore Talarico ,  Jan Zaleski

IPC: H04W88/06 ,  H04W76/27 ,  H04L27/26 ,  H04J13/00 ,  H04L5/00 ,  H04W72/04

Abstract: A user equipment (UE) can include processing circuitry coupled to memory. To configure the UE for New Radio (NR) communications above a 52.6 GHz carrier frequency, the processing circuitry is to decode radio resource control (RRC) signaling to obtain a cyclic shift value in time domain. The cyclic shift value is associated with a demodulation reference signal (DM-RS) antenna port (AP) of a plurality of available DM-RS APs. A single carrier based waveform DM-RS sequence corresponding to the DM-RS AP is generated using a base sequence and the cyclic shift value. The single carrier based waveform DM-RS sequence is encoded with uplink data for transmission to a base station using a physical uplink shared channel (PUSCH) using a carrier above the 52.6 GHz carrier frequency.

公开(公告)号：US20240114507A1

公开(公告)日：2024-04-04

申请号：US18280808

申请日：2022-05-10

Applicant: Intel Corporation

Inventor： Yingyang Li ,  Debdeep Chatterjee ,  Dae Won Lee ,  Yi Wang ,  Gang Xiong

IPC: H04W72/1273 ,  H04L1/1829 ,  H04W72/232

CPC classification number: H04W72/1273 ,  H04L1/1829 ,  H04W72/232

Abstract: A user equipment (UE) configured for operation in a fifth-generation new radio (5G NR) system may be configured for multi physical downlink shared channel (PDSCH) scheduling and may decode a first downlink control information (DCI) and a second DCI received from a gNodeB (gNB). The first DCI may schedule multiple PDSCHs and the second DCI may schedule one or more PDSCHs. The UE may check the timing relations of the scheduled PDSCHs for validity when the first DCI and the second DCI end at a same symbol. When the multiple PDSCHs scheduled by the first DCI and the one or more PDSCHs scheduled by the second DCI are determined to have overlapping time spans, the UE may identify all the PDSCHs scheduled by the first DCI the second DCI as invalid.

公开(公告)号：US11818773B2

公开(公告)日：2023-11-14

申请号：US16910957

申请日：2020-06-24

Applicant: Intel Corporation

Inventor： Bishwarup Mondal ,  Prerana Rane ,  Yongjun Kwak ,  Dae Won Lee ,  Carlos Aldana ,  Salvatore Talarico

IPC: H04L5/00 ,  H04W74/08 ,  H04W16/14 ,  H04W72/044 ,  H04W48/16

CPC classification number: H04W74/085 ,  H04W48/16 ,  H04W72/046

Abstract: An apparatus for a UE includes processing circuitry coupled to memory. To configure the UE for shared spectrum channel access in a 5G-NR system, the processing circuitry is to decode a synchronization signal (SS)/physical broadcast channel (PBCH) block (SSB) to obtain a master information block (MIB). System information block 1 (SIB1) configuration information is determined using the MIB. The SIB1 configuration information is used to configure a Type 0 PDCCH common search space (CSS) set (CORESET). The processing circuitry is to monitor for a PDCCH in the Type 0 PDCCH CSS set over slots that include Type 0 PDCCH monitoring occasions. At least one of the slots includes the SSB and the CORESET multiplexed according to multiplexing pattern 1. The PDCCH is detected in at least one of the Type 0 PDCCH monitoring occasions. A SIB1 is decoded using downlink control information (DCI) received via the detected PDCCH.

公开(公告)号：US20230224835A1

公开(公告)日：2023-07-13

申请号：US17991211

申请日：2022-11-21

Applicant: Intel Corporation

Inventor： Gang Xiong ,  Avik Sengupta ,  Yushu Zhang ,  Jie Zhu ,  Dae Won Lee ,  Alexei Vladimirovich Davydov ,  Gregory Vladimirovich Morozov

IPC: H04W56/00 ,  H04L5/00 ,  H04W48/20 ,  H04W88/02

CPC classification number: H04W56/0015 ,  H04L5/0094 ,  H04W48/20 ,  H04W88/02

Abstract: An apparatus of a user equipment (UE) includes processing circuitry, where to configure the UE for New Radio (NR) communications above a 52.6 GHz carrier frequency, the processing circuitry is to decode higher layer signaling, the higher layer signaling including a default slot duration for a transmission of control signaling. The control signaling includes a synchronization signal (SS) and a physical broadcast channel (PBCH) signaling. Synchronization information within a SS block is decoded. The SS block is received within a SS burst set and occupying a plurality of symbols within a slot having the default slot duration. A synchronization procedure is performed with a next generation Node-B (gNB) based on the synchronization information within the SS block and the PBCH signaling.

公开(公告)号：US20220095381A1

公开(公告)日：2022-03-24

申请号：US17527283

申请日：2021-11-16

Applicant: Intel Corporation

Inventor： Gang Xiong ,  Alexei Davydov ,  Yingyang Li ,  Dae Won Lee

IPC: H04W74/08

Abstract: A user equipment (UE) configured for operation in a sixth generation (6G) network may perform a random access channel (RACH) procedure with a generation node B (gNB). The UE may encode a physical random access channel (PRACH) preamble for transmission in a PRACH occasion (RO) For carrier frequencies above 52.6 GHz, the UE may determine a Radio Network Temporary Identifier (RNTI) (i.e., either a RA-RNTI or a MsgB-RNTI) based on an index of the PRACH occasion RO index. The UE may also decode a response from the gNB that includes the RNTI. The UE may determine the RNTI based on the RO index in a time domain and the RO index in a frequency domain.

公开(公告)号：US20190239283A1

公开(公告)日：2019-08-01

申请号：US16376333

申请日：2019-04-05

Applicant: Intel Corporation

Inventor： Yongjun Kwak ,  Dae Won Lee ,  Gregory V. Morozov ,  Seunghee Han ,  Hong He ,  Candy Yiu ,  Kyeongin Jeong

IPC: H04W88/02 ,  H04W74/08 ,  H04W72/12 ,  H04W72/04 ,  H04W80/02 ,  H04L1/00 ,  H04W56/00 ,  H04W76/27 ,  H04L1/18 ,  H04L5/00

CPC classification number: H04W88/023 ,  H04L1/0026 ,  H04L1/1819 ,  H04L5/0055 ,  H04W56/001 ,  H04W56/005 ,  H04W72/0413 ,  H04W72/0446 ,  H04W72/1242 ,  H04W74/0833 ,  H04W76/27 ,  H04W80/02

Abstract: An apparatus is configured for a user equipment (UE) device. The apparatus comprises baseband circuitry and/or application circuitry which includes a radio frequency (RF) interface and one or more processors. The one or more processors are configured to generate a physical random access channel (PRACH) within a slot at a medium access control (MAC) layer, generate a scheduling request (SR) within the slot at the MAC layer, determine a PRACH prioritization and an SR prioritization at a physical layer according to a prioritization rule; and provide the PRACH and the SR to the RF interface for transmission according to the prioritization rule.

公开(公告)号：US12160862B2

公开(公告)日：2024-12-03

申请号：US18374862

申请日：2023-09-29

Applicant: Intel Corporation

Inventor： Yingyang Li ,  Gang Xiong ,  Bishwarup Mondal ,  Dae Won Lee

IPC: H04W72/1273 ,  H04W48/10 ,  H04W72/044 ,  H04W72/30

Abstract: A generation-Node B (gNB) configured for unlicensed spectrum operation above 52.6 GHz in a fifth-generation new-radio (NR) system (5GS) may encode a parameter (e.g., ssb-PositionsInBurst) for transmission to a UE (e.g., in the SIB1 or UE specific RRC signalling). The parameter may indicate candidate positions of synchronization signal blocks (SSBs) within a discovery reference signal (DRS) measurement timing configuration (DMTC) transmission window within slots of a system frame (SFN). During the DMTC window, the gNB may perform a LBT procedure on an unlicensed carrier of the unlicensed spectrum to determine if the unlicensed carrier is available. When the LBT is successful (i.e., the unlicensed carrier is available), the gNB may encode a discovery reference signal (DRS) for transmission on the unlicensed carrier. The DRS may include one or more of the SSBs transmitted during the candidate positions that fall within the DRS. The gNB may perform rate matching around the SSBs for a scheduled PDSCH based on the indicated parameter and transmit the rate-matched PDSCH.

公开(公告)号：US11950267B2

公开(公告)日：2024-04-02

申请号：US17210493

申请日：2021-03-23

Applicant: Intel Corporation

Inventor： Dae Won Lee ,  Yingyang Li ,  Gang Xiong

IPC: H04W72/23 ,  H04L1/00 ,  H04L5/00 ,  H04L27/26 ,  H04W72/53 ,  H04W76/27

CPC classification number: H04W72/53 ,  H04L1/0061 ,  H04L5/0051 ,  H04L27/2636 ,  H04W72/23 ,  H04W76/27

Abstract: The disclosure provides mechanisms for transmission of multiple DCIs. An apparatus for an AN includes RF interface circuitry; and processing circuitry coupled with the interface circuitry and configured to: multiplex one or more PDCCHs carrying DCI for a UE in a TDM manner; perform a resource mapping to map the multiplexed one or more PDCCHs into frequency and time resources in a CORESET; and provide the multiplexed one or more PDCCHs to the RF interface circuitry for transmission to the UE with the frequency and time resources in the CORESET.