摘要:
A non-reciprocal mode converting SIW includes a first straight SIW section, a second straight SIW section, and a curved SIW section coupling the first straight SIW section to the second straight SIW section. The curved SIW section included magnetic biasing at opposed corner regions. The magnetic biasing and a curvature of the curved SIW section causes: (i) a wave in a first transverse electric (TE) mode that propagates in a forward direction from the first straight section through the curved SIW section into the second straight SIW section to convert to a second TE mode, and (ii) a wave in the first TE mode that propagates in a reverse direction from the second straight SIW section through the curved SIW section into the first straight SIW section to maintain the first TE mode.
摘要:
A circuit antenna includes an active device, and first and second antennas. The first antenna is connected to an input port of the active device. The first antenna has a first radiation field at an operating frequency of the circuit antenna. The second antenna is connected to an output port of the active device. The second antenna has a second radiation field at the operating frequency. The active device is positioned within the first and second radiation fields to experience an input load matching impedance at the input port and an output load matching impedance at the output port, due to the first and second radiation fields.
摘要:
Lost frame reconstruction is described. A previous good or reconstructed frame may be analyzed to determine a category for the lost frame. A percentage Pi may be associated with the determined category of the lost frame. A top Pi percent magnitude samples may be zeroed out in an excitation of the previous good or reconstructed frame to produce a reconstruction excitation. The reconstruction excitation may be applied to one or more linear prediction coefficients for the previous good or reconstructed frame to generate a reconstructed frame.
摘要:
An integrated balanced-filter which acts as a matching network, a balun and an extracted-pole bandpass filter is disclosed. The balanced-filter includes an unbalanced terminal, a first balanced terminal and a second balanced terminal, a first resonator connected to the unbalanced terminal, a second resonator connected to the first balanced terminal, and a third resonator connected to the second balanced terminal. The second resonator is positively coupled to the first resonator, and the third resonator is negatively coupled to the first resonator, which provides a balun function and a bandpass-filtering function. The balanced-filter further includes extracted-pole notch filters, which can introduce a transmission zero and implement matching network. The balanced-filter can be implemented in a multi-layered substrate, thereby reducing the size of the balanced-filter.
摘要:
The subject invention concerns materials and methods for enhancing starch production in plants. Starch production is enhanced, relative to levels observed in wildtype or control plants, by reduction of the plant 14-3-3 protein(s) which subsequently results in increased accumulation of starch in the plant. In one embodiment, the 14-3-3 protein expression is reduced using polynucleotides that are antisense to the 14-3-3 gene sequences expressed in the plant. In another embodiment, the 14-3-3 protein expression is reduced by “knockout” of a 14-3-3 gene or gene sequences. The subject invention also pertains to transformed and transgenic plants that have polynucleotides that are antisense to the 14-3-3 gene sequences expressed in the plant, wherein the transformed and transgenic plants exhibit enhanced starch production. The subject invention also pertains to “knockout” plants in which the normal functional 14-3-3 gene in the plant is deleted or replaced with a non-functional form of the gene. The subject invention also concerns the “antisense” polynucleotides of the invention that when introduced into a plant cell can function to effectively reduce expression of the 14-3-3 proteins in a plant.
摘要:
An electro-static-discharge (ESD) protection circuit is coupled between power and ground. It protects core circuits in a semiconductor chip. The ESD protection circuit is an active circuit that drives the gate of an n-channel clamp transistor. The clamp transistor shunts current from power to ground when its gate is driven high during an ESD event. A voltage divider generates a sense voltage that drives a first inverter. The sense voltage is normally much lower than the switch threshold of the first inverter. When an ESD voltage spike occurs, the sense voltage rises above the switch threshold, switching the output of the first inverter. A string of inverters is driven by the first inverter, with a final inverter driving the gate of the clamp transistor. An extending n-channel transistor drives the input of the final inverter low when the clamping transistor is on, extending the discharge time. A hysteresis p-channel transistor drives the output of the first inverter high, delaying turn-on of the clamp transistor. This increases the voltage required to trigger the protection circuit.
摘要:
A differential amplifier has a wide common-mode input range since it uses two complementary amplifiers. One amplifier has a differential pair of n-channel transistors while the other amplifier has a differential pair of p-channel transistors. The input range is extended further by replacing the current mirror transistors with load resistors. The load resistors continue to supply current to the differential pair transistors even when the input is within a transistor-threshold of the power or ground rails. The current through the load resistors is mirrored to intermediate mirror transistors that have their gate connected to the resistor's terminal node. Current in the differential amplifiers is mirrored as if current-mirror transistors were present rather than the load transistors. The intermediate mirror transistors supply current to inverse-mirror transistors. Since the inverse mirror transistors are of the opposite type as the intermediate mirror transistors, the inverse mirror transistors continue to operate when the input voltage is in the extreme of the range that shuts off the intermediate mirror transistors. Outputs of the intermediate and inverse mirror transistors of the two amplifiers are connected together and buffered by a final stage.