DIGITAL TRANSMITTER AND METHODS OF GENERATING RADIO-FREQUENCY SIGNALS USING TIME-DOMAIN OUTPHASING
    42.
    发明申请
    DIGITAL TRANSMITTER AND METHODS OF GENERATING RADIO-FREQUENCY SIGNALS USING TIME-DOMAIN OUTPHASING 有权
    数字信号发生器及使用时域输出产生无线电频率信号的方法

    公开(公告)号:US20080037662A1

    公开(公告)日:2008-02-14

    申请号:US11464352

    申请日:2006-08-14

    IPC分类号: H04K1/10

    摘要: Embodiments of a multicarrier transmitter and method of generating an RF signal for transmission are generally described herein. Other embodiments may be described and claimed. In some embodiments, a multicarrier transmitter generates RF signals for transmission using non-linear switching power amplifiers to amplify outphased switching waveforms allowing the multicarrier transmitter to operate more efficiently than some conventional multicarrier transmitters.

    摘要翻译: 多载波发射器的实施例和用于产生用于传输的RF信号的方法在本文中大体上被描述。 可以描述和要求保护其他实施例。 在一些实施例中,多载波发射机使用非线性开关功率放大器生成用于传输的RF信号,以放大允许多载波发射机比一些常规多载波发射机更有效地操作的外切开关波形。

    Method and apparatus to combine radio frequency signals
    43.
    发明授权
    Method and apparatus to combine radio frequency signals 有权
    组合射频信号的方法和装置

    公开(公告)号:US07197336B2

    公开(公告)日:2007-03-27

    申请号:US10608544

    申请日:2003-06-30

    IPC分类号: H04M1/00 G01S3/16

    CPC分类号: H04B7/0865

    摘要: The invention concerns 2-oxo-1-pyrrolidine derivatives and a process for preparing them and their uses. The invention also concerns a process for preparing α-ethyl-2-oxo-1-pyrrolidine acetamide derivatives from unsaturated 2-oxo-1-pyrrolidine derivatives. Particularly the invention concerns novel intermediates and their use in methods for the preparation of S-α-ethyl-2oxo-1-pyrrolidine acetamide.

    摘要翻译: 本发明涉及2-氧代-1-吡咯烷衍生物及其制备方法及其应用。 本发明还涉及从不饱和2-氧代-1-吡咯烷衍生物制备α-乙基-2-氧代-1-吡咯烷乙酰胺衍生物的方法。 特别地,本发明涉及新型中间体及其在制备S-α-乙基-2-氧代-1-吡咯烷乙酰胺的方法中的用途。

    Device, system and method of crosstalk cancellation
    44.
    发明申请
    Device, system and method of crosstalk cancellation 审中-公开
    串扰消除的装置,系统和方法

    公开(公告)号:US20070002722A1

    公开(公告)日:2007-01-04

    申请号:US11170790

    申请日:2005-06-30

    IPC分类号: H04J3/10 H04J3/22

    CPC分类号: H04B7/0613

    摘要: Briefly, some embodiments of the invention provide devices, systems and methods of crosstalk cancellation. For example, an apparatus may include a first transmission path to carry a first signal with information to be transmitted; a second transmission path to carry a second signal with information to be transmitted; a scaler associated with said first transmission path to scale said first signal into a scaled first signal; and a combiner to combine said scaled first signal and said second signal into a combined second signal on said second transmission path.

    摘要翻译: 简而言之,本发明的一些实施例提供了串扰消除的设备,系统和方法。 例如,装置可以包括用于携带具有要发送的信息的第一信号的第一传输路径; 第二传输路径,用于携带要传输的信息的第二信号; 与所述第一传输路径相关联的缩放器,以将所述第一信号缩放成缩放的第一信号; 以及组合器,用于将所述缩放的第一信号和所述第二信号组合成所述第二传输路径上的组合的第二信号。

    Quadrature oscillator and methods thereof
    45.
    发明授权
    Quadrature oscillator and methods thereof 有权
    正交振荡器及其方法

    公开(公告)号:US07146140B2

    公开(公告)日:2006-12-05

    申请号:US10608128

    申请日:2003-06-30

    IPC分类号: H03J7/32

    摘要: Briefly, exemplary embodiments of the invention may provide devices and methods to provide precise and/or low phase-noise quadrature oscillation signals. A quadrature oscillator in accordance with an exemplary embodiment of the invention may include, for example, a phase-shift generator to provide a phase-shift of substantially π/2 radians to an oscillation signal between a first oscillation tank, which provides substantially no phase-shift, and a second oscillation tank.

    摘要翻译: 简而言之,本发明的示例性实施例可以提供提供精确和/或低相位噪声正交振荡信号的装置和方法。 根据本发明的示例性实施例的正交振荡器可以包括例如相移发生器,以提供基本上π/ 2弧度的相移到第一振荡槽之间的振荡信号,第一振荡槽基本上不提供相位 和第二个振荡槽。

    Low loss interconnect structure for use in microelectronic circuits
    47.
    发明申请
    Low loss interconnect structure for use in microelectronic circuits 有权
    用于微电子电路的低损耗互连结构

    公开(公告)号:US20050227507A1

    公开(公告)日:2005-10-13

    申请号:US11152643

    申请日:2005-06-14

    IPC分类号: H01L23/522 H01R12/00

    摘要: A low loss on-die interconnect structure includes first and second differential signal lines on one of the metal layers of a microelectronic die. One or more traces may also be provided on another metal layer of the die that are non-parallel (e.g., orthogonal) to the differential signal lines. Because the traces are non-parallel, they provide a relatively high impedance return path for signals on the differential signal lines. Thus, a signal return path through the opposite differential line predominates for the signals on the differential lines. In one application, the low loss interconnect structure is used within an on-die salphasic clock distribution network.

    摘要翻译: 低损耗管芯互连结构包括在微电子管芯的金属层之一上的第一和第二差分信号线。 还可以在与差分信号线不平行(例如,正交))的管芯的另一金属层上提供一个或多个迹线。 由于迹线不平行,它们为差分信号线上的信号提供了相对较高的阻抗返回路径。 因此,通过相反的微分线路的信号返回路径对于差分线路上的信号占优势。 在一个应用中,低损耗互连结构用于管芯内的相关时钟分配网络。

    Adaptively extending tunable range of frequency in a closed loop
    48.
    发明授权
    Adaptively extending tunable range of frequency in a closed loop 有权
    在闭环中自适应地扩展频率的可调范围

    公开(公告)号:US06885873B2

    公开(公告)日:2005-04-26

    申请号:US10324686

    申请日:2002-12-19

    摘要: A semiconductor device or a circuit includes a controllable oscillator and circuitry that senses a voltage which may control the controllable oscillator and digitally controls a gain compensation, adaptively compensating for a drop in a gain against overall loop gain within a closed loop. In one embodiment, a single supply source may be used to power the closed loop while a variable gain stage that is digitally controllable may adjust the gain in a feed-forward manner based on the drop.

    摘要翻译: 半导体器件或电路包括可控振荡器和电路,其感测可控制可控振荡器并且数字控制增益补偿的电压,自适应地补偿增益中的下降与闭环内的整体环路增益。 在一个实施例中,可以使用单个供电源为闭环供电,而可数字控制的可变增益级可以基于该下降以前馈方式调整增益。

    Clock receiver circuit for on-die salphasic clocking
    49.
    发明授权
    Clock receiver circuit for on-die salphasic clocking 有权
    时钟接收器电路,用于片上相关时钟

    公开(公告)号:US06614279B2

    公开(公告)日:2003-09-02

    申请号:US09941457

    申请日:2001-08-29

    IPC分类号: H03F345

    CPC分类号: G06F1/10

    摘要: A clock receiver circuit converts low amplitude, differential clock signal components received from a differential clock distribution medium into a full swing digital clock. The clock receiver circuit can be used as part of, for example, an on-die salphasic clock distribution system within a microelectronic device.

    摘要翻译: 时钟接收器电路将从差分时钟分配介质接收的低幅度差分时钟信号分量转换成全摆幅数字时钟。 时钟接收器电路可以用作例如微电子器件内的管芯上的相关时钟分配系统的一部分。

    Leakage-tolerant keeper with dual output generation capability for deep sub-micron wide domino gates
    50.
    发明授权
    Leakage-tolerant keeper with dual output generation capability for deep sub-micron wide domino gates 有权
    具有双输出产生能力的漏电保护器,用于深亚微米宽多米诺骨门

    公开(公告)号:US06549040B1

    公开(公告)日:2003-04-15

    申请号:US09608683

    申请日:2000-06-29

    IPC分类号: H03K19096

    CPC分类号: H03K19/0963

    摘要: A circuit including a clock signal input to receive a clock signal, at least one data signal input to receive at least one data signal, and a multiple input conditional inverter to receive the clock signal and the data signal, and to generate a dynamic output. The circuit also includes a conditional keeper circuit to charge a dynamic output node when the clock is evaluating and the dynamic output is high.

    摘要翻译: 一种电路,包括输入时钟信号以接收时钟信号,输入至少一个数据信号以接收至少一个数据信号,以及多输入条件反相器以接收时钟信号和数据信号,并产生动态输出。 电路还包括条件保持器电路,用于在时钟评估和动态输出为高时为动态输出节点充电。