公开(公告)号：US20190289393A1

公开(公告)日：2019-09-19

申请号：US16260325

申请日：2019-01-29

Applicant: QUALCOMM Incorporated

Inventor： Lior Amarilio ,  Ghanashyam Prabhu ,  Sharon Graif ,  Mouna Elkhatib

IPC: H04R3/12 ,  G06F3/16 ,  H04R5/04

Abstract: Exemplary aspects of the present disclosure assist in phase alignment for systems having multiple audio sources. For example, in a system having plural microphones, phase alignment may also be assisted by sampling the microphones at the appropriate time relative to when the samples are placed on the audio bus. Further, phase shifts between audio samples are reduced or eliminated by keeping a sample delay constant for samples from the same microphone. Such manipulation of the audio samples reduces phase shifts which reduces the likelihood of an audio artifact capable of being detected by the human ear and thus improves consumer experience.

公开(公告)号：US20150378955A1

公开(公告)日：2015-12-31

申请号：US14316026

申请日：2014-06-26

Applicant: QUALCOMM Incorporated

Inventor： Yossi Amon ,  David Asher Friedman ,  Ben Levin ,  Sharon Graif

IPC: G06F13/42 ,  G06F13/364

CPC classification number: G06F13/4226 ,  G06F13/364 ,  G06F13/4291

Abstract: Generating combined bus clock signals using asynchronous master device reference clocks in shared bus systems, and related methods, devices, and computer-readable media are disclosed. In one aspect, a method for generating combined bus clock signals comprises detecting a start event by each master device of multiple master devices communicatively coupled to a shared clock line of a shared bus. Each master device samples a plurality of shared clock line values of the shared clock line at a corresponding plurality of transitions of a reference clock signal for the master device. Each master device determines whether the plurality of shared clock line values is identical. If the shared clock line values are identical, each master device drives a shared clock line drive value inverse to the plurality of shared clock line values to the shared clock line at a next transition of the reference clock signal for the master device.

Abstract translation: 公开了在共享总线系统中使用异步主设备参考时钟生成组合总线时钟信号，以及相关方法，设备和计算机可读介质。 一方面，一种用于产生组合总线时钟信号的方法包括：通过通信耦合到共享总线的共享时钟线的多个主设备的每个主设备检测起始事件。 每个主设备在主设备的参考时钟信号的相应多个转换处对共享时钟线的多个共享时钟线值进行采样。 每个主设备确定多个共享时钟线值是否相同。 如果共享时钟线路值相同，则在主设备的参考时钟信号的下一个转换处，每个主设备将共享时钟线驱动值与多个共享时钟线路值相反地驱动到共享时钟线路。