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公开(公告)号:US10853923B2
公开(公告)日:2020-12-01
申请号:US15927820
申请日:2018-03-21
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: A method for geometrically correcting a distorted input frame and generating an undistorted output frame includes capturing and storing an input frame in an external memory, allocating an output frame with an output frame size and dividing the output frame into output blocks, computing a size of the input blocks in the input image corresponding to each output blocks, checking if the size of the input blocks is less than the size of the internal memory and if not dividing until the required input block size of divided sub blocks is less than the size of the internal memory, programming an apparatus with input parameters, fetching the input blocks into an internal memory, processing each of the divided sub blocks sequentially and processing the next output block in step until all the output blocks are processed; and composing the output frame for each of the blocks in the output frame.
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公开(公告)号:US20190096041A1
公开(公告)日:2019-03-28
申请号:US15714862
申请日:2017-09-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: An apparatus and method for geometrically correcting a distorted input frame and generating an undistorted output frame. The apparatus includes an external memory block that stores the input frame, a counter block to compute output coordinates of the output frame for a region based on a block size of the region, a back mapping block to generate input coordinates corresponding to each of the output coordinates, a bounding module to compute input blocks corresponding to each of the input coordinates, a buffer module to fetch data corresponding to each of the input blocks, an interpolation module to interpolate data from the buffer module and a display module that receives the interpolated data for each of the regions and stitch an output image. The method includes determining the size of the output block based on a magnification data.
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公开(公告)号:US20170339325A1
公开(公告)日:2017-11-23
申请号:US15157568
申请日:2016-05-18
Applicant: Texas Instruments Incorporated
Inventor: Shashank Dabral , Rajasekhar Reddy Allu
CPC classification number: H04N5/2352 , H04N5/217 , H04N5/2353 , H04N5/2355 , H04N5/265 , H04N5/35581 , H04N9/735
Abstract: Disclosed examples include integrated circuits, merge circuits and methods of processing multiple-exposure image data, in which a single pre-processing circuit is used for pre-processing first input exposure data associated with a first exposure of the image, and then for pre-processing second input exposure data associated with a second exposure of the image, and the first and second pre-processed exposure data are merged to generate merged image data for tone mapping and other post-processing. An example merge circuit includes a configurable gain circuit to apply a gain to the first and/or second exposure data, as well as a configurable weighting circuit with a weight calculation circuit and a motion adaptive filter circuit to compute a first and second weight values for merging the pre-processed first and second exposure data.
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公开(公告)号:US20170132754A1
公开(公告)日:2017-05-11
申请号:US15143491
申请日:2016-04-29
Applicant: Texas Instruments Incorporated
Inventor: Mihir Narendra Mody , Brian Chae , Shashank Dabral , Niraj Nandan , Hetul Sanghvi
Abstract: An apparatus for scaling images is provided that includes at least two input ports, a scaling component coupled to the at least two input ports, the scaling component including a plurality of scalers, the scaling component configurable to map any scaler to any input port of the at least two input ports and configurable to map more than one scaler to any input port, and a memory coupled to the at least two input ports and to outputs of the plurality of scalers, the memory configured to store image data for each input port and scaled image data output by the plurality of scalers.
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公开(公告)号:US12131504B2
公开(公告)日:2024-10-29
申请号:US17538268
申请日:2021-11-30
Applicant: Texas Instruments Incorporated
Inventor: Gang Hua , Mihir Narendra Mody , Niraj Nandan , Shashank Dabral , Rajasekhar Reddy Allu , Denis Roland Beaudoin
CPC classification number: G06T7/90 , G06T1/20 , G06T2207/10024 , G06T2207/20208
Abstract: Techniques for image processing including receiving input image data, wherein the input image data includes data associated with a clear color channel, receiving a color offset value associated with a color channel, wherein color values for the color channel are not provided in the input image data, based on the color offset value, generating intermediate estimated color values for the color channel, wherein generating the intermediate estimated color values includes: clipping color values that have a magnitude greater than the color offset value, and adjusting color values that have a magnitude less than the color offset value based on the color offset value, applying a color correction function to the intermediate estimated color values based on the color offset value to determine color corrected estimated color values, and outputting the color corrected estimated color values.
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公开(公告)号:US11758279B2
公开(公告)日:2023-09-12
申请号:US17213286
申请日:2021-03-26
Applicant: Texas Instruments Incorporated
Inventor: Mayank Mangla , Shashank Dabral , Peter Labaziewicz
IPC: H04N5/235 , H01L27/146 , H04N23/741 , G06T5/50 , H04N23/56 , H04N23/74 , H04N23/743 , H04N23/745
CPC classification number: H04N23/741 , G06T5/50 , H04N23/56 , H04N23/74 , H04N23/743 , H04N23/745 , G06T2207/10144 , G06T2207/20208
Abstract: A method of WDR imaging. Exposure times (ETs) are set for first and second frames for an image sensor to avoid second frame saturating by setting a second ET>1/a PWM frequency applied to an LED illuminating a scene to generate second longer ET pixel data (PD). The first frame has first PD and a first ET
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公开(公告)号:US11599975B2
公开(公告)日:2023-03-07
申请号:US16930342
申请日:2020-07-16
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rajasekhar Reddy Allu , Niraj Nandan , Mihir Narendra Mody , Gang Hua , Brian Okchon Chae , Shashank Dabral , Hetul Sanghvi , Vikram VijayanBabu Appia , Sujith Shivalingappa
Abstract: An apparatus and method for geometrically correcting a distorted input frame and generating an undistorted output frame. The apparatus includes an external memory block that stores the input frame, a counter block to compute output coordinates of the output frame for a region based on a block size of the region, a back mapping block to generate input coordinates corresponding to each of the output coordinates, a bounding module to compute input blocks corresponding to each of the input coordinates, a buffer module to fetch data corresponding to each of the input blocks, an interpolation module to interpolate data from the buffer module and a display module that receives the interpolated data for each of the regions and stitch an output image. The method includes determining the size of the output block based on a magnification data.
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公开(公告)号:US11592154B2
公开(公告)日:2023-02-28
申请号:US17565688
申请日:2021-12-30
Applicant: Texas Instruments Incorporated
Inventor: Shashank Dabral , Gavin Perrella , Akeem Whitehead
IPC: B60Q1/14 , H05B45/30 , H05B45/325 , F21S41/65 , F21S41/675
Abstract: An example headlight includes: a multi-segment illumination source comprising: a first illumination source segment; and a second illumination source segment; driver circuitry coupled to the multi-segment illumination source, the driver circuitry comprising: a first driver coupled to the first illumination source segment, the first driver configured to generate a first drive signal to cause the first illumination source segment to produce a first light having a first brightness; and a second driver coupled to the second illumination source segment, the second driver configured to generate a second drive signal to cause the second illumination source segment to produce a second light having a second brightness; and a spatial light modulator (SLM) optically coupled to the multi-segment illumination source, the SLM configured to: receive the first light; modulate the first light to produce first modulated light; receive the second light; and modulate the second light to produce second modulated light.
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公开(公告)号:US20230058081A1
公开(公告)日:2023-02-23
申请号:US17719008
申请日:2022-04-12
Applicant: Texas Instruments Incorporated
Inventor: Shashank Dabral , Jaime De La Cruz , Jeffrey Kempf
Abstract: An example apparatus includes: a controller configured to: generate a symbol pattern as a result of placing symbols based on epipolar lines; instruct an SLM to project the symbol pattern; obtain an image of a reflection of the symbol pattern; determine a first location of a symbol in the image; determine a second location of the symbol in the image; and determine a depth of the symbol as based on the first location, the second location, and an essential matrix.
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公开(公告)号:US11546562B2
公开(公告)日:2023-01-03
申请号:US17497560
申请日:2021-10-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Mihir Narendra Mody , Shashank Dabral , Rajasekhar Allu , Niraj Nandan
Abstract: An image signal processor includes a first matrix processing circuit, a post processing circuit, a second matrix processing circuit, and a split visual and analytics circuit. The first matrix processing circuit is configured to receive a plurality of component images generated based on an image captured by an image sensor and generate a plurality of first matrix outputs based on the plurality of component images. The post processing circuit is configured to perform color conversion on the plurality of first matrix outputs to generate a first luminance component of the image and a chrominance component of the image. The second matrix processing circuit is configured to perform color conversion on the plurality of first matrix outputs to generate a second luminance component of the image and a saturation component of the image. The split visual and analytics circuit is configured to generate visual and analytic data of the image.
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