公开(公告)号：US08279023B2

公开(公告)日：2012-10-02

申请号：US12608535

申请日：2009-10-29

申请人： Sachio Iida ,  Atsushi Yoshizawa

发明人： Sachio Iida ,  Atsushi Yoshizawa

IPC分类号： H03H19/00 ,  H03H7/12

CPC分类号： H03H19/004

摘要： There is provided a filter circuit that includes: a flying capacitor which maintains polarity when switching from an input terminal to an output terminal, and the polarity of which is reversed when switching from the output terminal to the input terminal; a first capacitor that is provided in parallel to the flying capacitor, at the input terminal of the flying capacitor; and a second capacitor that is provided in parallel to the flying capacitor, at the output terminal of the flying capacitor. The flying capacitor includes a variable capacity element such that capacity becomes smaller when switching from the input terminal to the output terminal and capacity becomes larger when switching from the output terminal to the input terminal.

摘要翻译： 提供了一种滤波电路，其包括：当从输入端子切换到输出端子时保持极性的飞行电容器，并且当从输出端子切换到输入端子时其极性反转; 在所述飞行电容器的输入端子处与所述飞行电容器并联设置的第一电容器; 以及与飞跨电容器并联设置的第二电容器，位于飞行电容器的输出端。 飞越电容器包括可变电容元件，使得当从输入端子切换到输出端子时容量变小，并且当从输出端子切换到输入端子时，容量变大。

公开(公告)号：US07834797B2

公开(公告)日：2010-11-16

申请号：US12273287

申请日：2008-11-18

申请人： Sachio Iida ,  Atsushi Yoshizawa

发明人： Sachio Iida ,  Atsushi Yoshizawa

IPC分类号： H03M1/12

CPC分类号： H03H19/004 ,  H03M3/458

摘要： A switched capacitor circuit includes a capacitor that performs sampling, a first switch that is provided between the capacitor and an input terminal, and a second switch that is provided between the capacitor and an output terminal. The first switch and the second switch receive an input of a clock signal and turn on and off. The capacitor is a variable capacitance element in which the value of the capacitance changes in synchronization with the clock signal.

摘要翻译： 开关电容电路包括执行采样的电容器，设置在电容器和输入端子之间的第一开关和设置在电容器和输出端子之间的第二开关。 第一开关和第二开关接收时钟信号的输入并接通和断开。 电容器是可变电容元件，其中电容值与时钟信号同步地改变。

公开(公告)号：US20090160577A1

公开(公告)日：2009-06-25

申请号：US12092793

申请日：2007-09-06

申请人： Atsushi Yoshizawa ,  Sachio Iida

发明人： Atsushi Yoshizawa ,  Sachio Iida

IPC分类号： H03H7/00

CPC分类号： H03H19/004 ,  H03H15/023

摘要： (Problem) To provide a charge sampling filter circuit and a charge sampling method.(Means for Resolution) A charge sampling filter circuit includes a first capacitor that samples an input signal, and in which at least a portion of electric charge stored in the first capacitor by sampling is output to a second capacitor that is connectable with the first capacitor. The charge sampling filter circuit is characterized by including a switching portion that switches a circuit mode including a sampling mode that causes the first capacitor to sample the input signal, and an output mode that causes the first capacitor and the second capacitor to be connected. A capacitance value of the first capacitor in the output mode is set to be lower than the capacitance value in the sampling mode.

摘要翻译： （问题）提供电荷采样滤波电路和电荷采样方法。 （分辨装置）电荷采样滤波器电路包括对输入信号进行采样的第一电容器，其中通过采样将存储在第一电容器中的电荷的至少一部分输出到可与第一电容器连接的第二电容器 。 电荷采样滤波器电路的特征在于包括切换部分，其切换包括使第一电容器对输入信号进行采样的采样模式的电路模式，以及使第一电容器和第二电容器连接的输出模式。 将输出模式中的第一电容器的电容值设定为低于采样模式下的电容值。

公开(公告)号：US07489174B2

公开(公告)日：2009-02-10

申请号：US11709770

申请日：2007-02-23

申请人： Atsushi Yoshizawa

发明人： Atsushi Yoshizawa

IPC分类号： H03K3/00

CPC分类号： H03K5/15093 ,  H03K23/44 ,  H03K23/542

摘要： A dynamic flip-flop circuit which outputs an output signal on which a digital data signal is reflected based on a clock, includes: a first control stage configured to output a signal having a level inverted from that of the digital data signal within a period within which the clock has a second level; a second control stage configured to output a signal of a first level within the period within which the clock has the second level and a signal of a level within another period within which the clock has the first level; a third control stage configured to output an output signal of the first level within a period within which the signal outputted from the second control stage has the second level; and a phase adjustment circuit configured to adjust the phase to produce a second clock and supply the second clock to the third control stage.

摘要翻译： 输出基于时钟反映数字数据信号的输出信号的动态触发电路包括：第一控制级，被配置为在其内部的周期内输出具有与数字数据信号的电平相反的电平的信号 时钟有二级; 第二控制级，被配置为在所述时钟具有所述第二电平的时段内输出第一电平的信号，以及在所述时钟具有所述第一电平的另一周期内输出电平的信号; 第三控制级，被配置为在从第二控制级输出的信号具有第二级的时段内输出第一级的输出信号; 以及相位调整电路，被配置为调整相位以产生第二时钟并将第二时钟提供给第三控制级。

公开(公告)号：US20090021297A1

公开(公告)日：2009-01-22

申请号：US12174422

申请日：2008-07-16

申请人： Atsushi Yoshizawa ,  Sachio Iida

发明人： Atsushi Yoshizawa ,  Sachio Iida

IPC分类号： H04B1/10

CPC分类号： H03H15/023 ,  H03H19/004

摘要： There is provided a signal processing apparatus including a variable capacitor and a switching portion for switching the circuit mode between a sampling mode, in which the variable capacitor samples an input signal, a holding mode, in which a charge gained by sampling the input signal is held in the variable capacitor, and an output mode for outputting the charge stored in the variable capacitor, wherein the variable capacitor is provided with an input terminal through which the input signal is inputted in the sampling mode, a control terminal to which a first control signal which decreases the capacitance of the variable capacitor to a value below the capacitance in the sampling mode is inputted in the output mode, and a second control signal having a predetermined reference voltage is inputted in the holding mode, where an insulating layer is provided between the control terminal and the input terminal.

摘要翻译： 提供了一种信号处理装置，包括可变电容器和切换部分，用于在可变电容器对输入信号进行采样的采样模式之间切换电路模式，其中通过对输入信号进行采样获得的电荷为 保持在可变电容器中的输出模式，以及用于输出存储在可变电容器中的电荷的输出模式，其中可变电容器设置有以采样模式输入输入信号的输入端子，第一控制 在输出模式中输入将可变电容器的电容减小到低于采样模式下的电容值的信号，并且在保持模式中输入具有预定参考电压的第二控制信号，其中在 控制端子和输入端子。

公开(公告)号：US07469134B2

公开(公告)日：2008-12-23

申请号：US10998891

申请日：2004-11-29

申请人： Atsushi Yoshizawa ,  Masahisa Tamura

发明人： Atsushi Yoshizawa ,  Masahisa Tamura

IPC分类号： H04B1/06

CPC分类号： H03G3/3052

摘要： In order to avoid disappearance of output symbols in accompaniment with DC voltage fluctuations occurring at the timing of switching gain in receiving systems for mobile telephones or the like compatible with W-CDMA systems, the present invention provides a variable gain amplifier circuit, a gain control circuit and a mobile communication terminal apparatus, in which a PGA section is comprised of PGAs having different amplification widths continuously arranged in plural stages as in, two coarse adjustment PGAs, a fine adjustment PGA and a coarse adjustment PGA from the input side to the output side; and a gain control circuit has a memory storing a history of gain control with regard to the PGA section and a logic circuit individually controlling gain of each PGA.

摘要翻译： 为了避免伴随着与W-CDMA系统兼容的移动电话等的接收系统中的切换增益的定时发生的直流电压波动的输出符号的消失，本发明提供了可变增益放大器电路，增益控制 电路和移动通信终端装置，其中PGA部分由具有不同放大宽度的PGA组成，多个阶段连续排列，如两个粗调PGA，微调PGA和粗调PGA从输入侧到输出 侧; 并且增益控制电路具有存储关于PGA部分的增益控制历史的存储器和分别控制每个PGA的增益的逻辑电路。

公开(公告)号：US07116549B2

公开(公告)日：2006-10-03

申请号：US11347714

申请日：2006-02-03

申请人： Naoki Anzai ,  Shogo Aizawa ,  Tomohiro Matsuzaki ,  Norihito Fukui ,  Atsushi Yoshizawa ,  Hidehiko Itoh ,  Atsushi Yamada ,  Katsumi Abe

发明人： Naoki Anzai ,  Shogo Aizawa ,  Tomohiro Matsuzaki ,  Norihito Fukui ,  Atsushi Yoshizawa ,  Hidehiko Itoh ,  Atsushi Yamada ,  Katsumi Abe

IPC分类号： H01G4/32 ,  H01G9/04 ,  H01G9/02

CPC分类号： H01G9/028 ,  H01G9/0036 ,  H01G9/02 ,  H01G9/151 ,  Y10T29/417

摘要： A cathode foil and an anode foil, with an oxidized film layer formed on the surface and a separator interposed therebetween, are wound together to form a capacitor element, and prior to subjecting the capacitor element to chemical repair the content of the binder in the separator is adjusted to 10 to 20% with respect to the total weight of the separator. After the chemical repair, the capacitor element is immersed in mixed liquid prepared by mixing a polymerizable monomer and an oxidizing agent together with a predetermined solvent, a polymerization reaction of the electroconductive polymer is induced in the capacitor element, and a solid electrolyte layer is formed. The capacitor element is then inserted in an outer case; sealing rubber is mounted in the open-end portion and sealed with a tightening operation; and the unit is thereafter aged to form a solid electrolytic capacitor.

公开(公告)号：US20060208251A1

公开(公告)日：2006-09-21

申请号：US10521442

申请日：2003-07-10

申请人： Atsushi Yoshizawa

发明人： Atsushi Yoshizawa

IPC分类号： H01L29/08

CPC分类号： H01L51/0504 ,  H01L51/0059 ,  H01L51/0078 ,  H01L51/0081 ,  H01L51/0508

摘要： The invention provides an organic semiconductor device with a p-type organic semiconductor layer sandwiched between a source electrode and a drain electrode including an n-type organic semiconductor layer formed in an intermediate portion of the p-type organic semiconductor layer and a gate electrode embedded in the n-type organic semiconductor layer, and an organic semiconductor device with an n-type organic semiconductor layer sandwiched between a source electrode and a drain electrode includes a p-type organic semiconductor layer formed in an intermediate portion of the n-type organic semiconductor layer and a gate electrode embedded in the p-type organic semiconductor layer, thereby suppressing a leak current generated between the electrodes. The invention also provides an organic semiconductor device including an organic semiconductor layer sandwiched between a source electrode and a drain electrode and having a carrier transporting property, and a gate electrode constituted of at least two intermediate electrode pieces which are embedded in the organic semiconductor layer, are respectively provided in at least two planes separated from and parallel to the source electrode and the drain electrode, and are positioned in a direction across the layer thickness. The gate electrode is embedded by fusing the organic semiconductor layer.

摘要翻译： 本发明提供一种有机半导体器件，其具有夹在源电极和漏电极之间的p型有机半导体层，所述源电极和漏电极包括形成在p型有机半导体层的中间部分中的n型有机半导体层和嵌入 在n型有机半导体层中，具有夹在源电极和漏电极之间的n型有机半导体层的有机半导体器件包括在n型有机半导体层的中间部分形成的p型有机半导体层 半导体层和嵌入在p型有机半导体层中的栅电极，从而抑制在电极之间产生的漏电流。 本发明还提供了一种有机半导体器件，包括夹在源电极和漏电极之间并具有载流子传输性质的有机半导体层，以及由至少两个嵌入有机半导体层的中间电极片构成的栅电极， 分别设置在与源极电极和漏极电极分离并平行的至少两个平面中，并且位于穿过层厚度的方向上。 通过熔合有机半导体层来嵌入栅电极。

公开(公告)号：US07027292B2

公开(公告)日：2006-04-11

申请号：US10509550

申请日：2003-03-28

申请人： Naoki Anzai ,  Shogo Aizawa ,  Tomohiro Matsuzaki ,  Norihito Fukui ,  Atsushi Yoshizawa ,  Hidehiko Itoh ,  Atsushi Yamada ,  Katsumi Abe

发明人： Naoki Anzai ,  Shogo Aizawa ,  Tomohiro Matsuzaki ,  Norihito Fukui ,  Atsushi Yoshizawa ,  Hidehiko Itoh ,  Atsushi Yamada ,  Katsumi Abe

IPC分类号： H01G4/32 ,  H01G9/04 ,  H01G9/02

CPC分类号： H01G9/028 ,  H01G9/0036 ,  H01G9/02 ,  H01G9/151 ,  Y10T29/417

摘要： Negative electrode foil and positive electrode foil having an oxide coating layer formed on the surface thereof with a separator, the separator containing a binder constituted of a compound having a vinyl group, interposed therebetween are wound up to thereby form a capacitor element. The content of binder in the separator is adjusted to 10–20% based on the total weight of separator before subjecting the capacitor element to restoration and chemical conversion. After the restoration and chemical conversion, the capacitor element is immersed in a liquid mixture prepared by mixing a polymerizable monomer, an oxidizer and a given solvent together so that polymerization reaction of conductive polymer is effected in the capacitor element to thereby form a solid electrolyte layer. The thus obtained capacitor element is inserted in a sheath case, and its opening end is fitted with sealing rubber. Sealing is accomplished by fastening operation, and aging is performed. Thus, a solid electrolytic capacitor is obtained.

摘要翻译： 在其表面上形成有隔膜的负极箔和正极箔，其中含有由具有乙烯基的化合物构成的粘结剂的隔膜夹在中间，从而形成电容器元件。 在对电容器元件进行恢复和化学转化之前，将隔板中的粘合剂的含量基于隔板的总重量调节至10-20％。 在恢复和化学转化后，将电容器元件浸入通过将可聚合单体，氧化剂和给定溶剂混合在一起而制备的液体混合物中，使得在电容器元件中进行导电聚合物的聚合反应，从而形成固体电解质层 。 将如此获得的电容器元件插入护套壳体中，其开口端装有密封橡胶。 通过紧固操作实现密封，并进行老化。 因此，得到固体电解电容器。

公开(公告)号：US06222315B1

公开(公告)日：2001-04-24

申请号：US09144651

申请日：1998-08-31

申请人： Atsushi Yoshizawa ,  Hirofumi Kubota ,  Kenji Yoshida ,  Taizo Ishida

发明人： Atsushi Yoshizawa ,  Hirofumi Kubota ,  Kenji Yoshida ,  Taizo Ishida

IPC分类号： H05B3322

CPC分类号： H01L27/3283 ,  H01L51/5206 ,  H01L2251/5392 ,  H05B33/22

摘要： A luminescent display panel includes a substrate (106), a plurality of first electrodes (102) formed on the substrate (106), and a plurality of insulating films (109) formed on the substrate (106) to cover edge portions of each first electrode (102) and having the central portion thereof exposed. A luminescent layer (103) is formed on exposed portions of the first electrodes (102) and on the insulating films (109), and a plurality of second electrodes (101) are formed on the luminescent layer (103). Each of the plurality of insulating films (109) has a thickness which becomes gradually smaller toward a center line of each adjacent first electrode (102).

摘要翻译： 发光显示面板包括基板（106），形成在基板（106）上的多个第一电极（102）和形成在基板（106）上的多个绝缘膜（109），以覆盖每个第一 电极（102）并使其中心部分露出。 在第一电极（102）的暴露部分和绝缘膜（109）上形成发光层（103），在发光层（103）上形成多个第二电极（101）。 多个绝缘膜（109）中的每一个具有朝向相邻的第一电极（102）的中心线逐渐变小的厚度。