-
公开(公告)号：US20110144969A1
公开(公告)日：2011-06-16
申请号：US12635830
申请日：2009-12-11
申请人： John C. Dayka , Tamas Visegrady
发明人： John C. Dayka , Tamas Visegrady
摘要： A method for creating entropy in a virtualized computing environment includes waking one or more samplers, each sampler having a sampling frequency; sampling a sample source with each of the one or more samplers; placing each of the samplers in an inactive state when not sampling; determining a difference between an expected value and a sampled value at each sampler; and providing a function of the difference from each of the one or more samplers to an aggregator.
摘要翻译： 用于在虚拟化计算环境中创建熵的方法包括唤醒一个或多个采样器，每个采样器具有采样频率; 用一个或多个采样器中的每一个采样样品源; 当不采样时，将每个采样器置于非活动状态; 确定每个采样器的期望值和采样值之间的差; 并且向所述聚合器提供与所述一个或多个采样器中的每一个的差异的功能。
-
公开(公告)号：US20110106870A1
公开(公告)日：2011-05-05
申请号：US12915003
申请日：2010-10-28
摘要： A system and method for providing non-deterministic data for processes executed by non-synchronized processor elements of a fault resilient system is discussed. The steps of the method comprise receiving a request for getting non-deterministic data from a requesting processor element; assigning non-deterministic data generated by an entropy source to the request; and supplying the non-deterministic data assigned to the request, to the requesting processor element.
摘要翻译： 讨论了用于为故障恢复系统的非同步处理器元件执行的处理提供非确定性数据的系统和方法。 所述方法的步骤包括从请求处理器元件接收获取非确定性数据的请求; 将由熵源产生的非确定性数据分配给所述请求; 以及将分配给该请求的非确定性数据提供给请求处理器元件。
-
公开(公告)号：US20100038439A1
公开(公告)日：2010-02-18
申请号：US12228711
申请日：2008-08-15
IPC分类号： G06K19/06
CPC分类号： G06K19/06037 , G06K2019/06225
摘要： A color-based content encoding system is provided that includes providing a color-containing image from an electronic device display including a fixed pixel grid, wherein the color-containing image includes a plurality of color pixels on the fixed pixel grid, each of the color pixels having sub-pixels correlating to encoded binary data; reading the color-containing image with a scanner; and decoding the encoded binary data. In one embodiment, the plurality of sub-pixels includes three sub-pixels, wherein each sub-pixel of the three sub-pixels corresponds to a binary data value of “1” or “0”.
摘要翻译： 提供了一种基于颜色的内容编码系统，其包括从包括固定像素网格的电子设备显示器提供包含颜色的图像，其中所述含颜色的图像包括所述固定像素网格上的多个彩色像素， 具有与编码的二进制数据相关的子像素的像素; 用扫描仪读取含有颜色的图像; 并对编码的二进制数据进行解码。 在一个实施例中，多个子像素包括三个子像素，其中三个子像素的每个子像素对应于二进制数据值“1”或“0”。
-
44.发明授权Method and computer system with anti-tamper capability and thermal packaging structure for implementing enhanced heat removal from processor circuitry 有权具有防篡改能力和热封装结构的方法和计算机系统，用于从处理器电路实现增强的散热公开(公告)号：US07551444B2
公开(公告)日：2009-06-23
申请号：US11930539
申请日：2007-10-31
申请人： William James Anderl , Vincenzo Valentino Di Luoffo , Eric Alan Eckberg , David Roy Motschman , Tamas Visegrady
发明人： William James Anderl , Vincenzo Valentino Di Luoffo , Eric Alan Eckberg , David Roy Motschman , Tamas Visegrady
IPC分类号： H05K7/20
CPC分类号： H01L23/427 , G06F1/20 , H01L2924/0002 , Y10T29/4935 , H01L2924/00
摘要： A method and computer processor system with anti-tamper capability and thermal packaging structure for implementing enhanced heat removal from processor circuitry, such as, a high-performance cell processor complex, and a design structure on which the subject circuit resides are provided. The computer system includes predefined processor circuits including anti-tamper logic. A volume container substantially contains the predefined processor circuits including the anti-tamper logic. A heat spreader is provided with the predefined processor circuits within the volume container. An external heatsink structure is attached to an outside cover above the volume container. The heatsink structure includes a heatsink base and a plurality of parallel fins extending outwardly from the heatsink base. A heat pipe extending through a folded mesh is attached to the heat spreader within the volume container and is attached to the external heatsink base providing an effective heat removal path for the processor circuits.
摘要翻译： 一种具有防篡改能力和热封装结构的方法和计算机处理器系统，用于实现从诸如高性能单元处理器复合体的处理器电路以及设置有被摄体电路所在的设计结构的增强散热。 计算机系统包括预定义的处理器电路，包括防篡改逻辑。 体积容器基本上包含预定的处理器电路，包括防篡改逻辑。 散热器在容积容器内设置有预定的处理器电路。 外部散热器结构附接到容积容器上方的外部盖子。 散热器结构包括散热器基座和从散热器基座向外延伸的多个平行翅片。 延伸穿过折叠网状物的热管连接到容积容器内的散热器，并附接到外部散热器基座，为处理器电路提供有效的散热路径。
-
45.发明申请METHOD AND COMPUTER SYSTEM WITH ANTI-TAMPER CAPABILITY AND THERMAL PACKAGING STRUCTURE FOR IMPLEMENTING ENHANCED HEAT REMOVAL FROM PROCESSOR CIRCUITRY 有权具有抗加速能力和热包装结构的方法和计算机系统，用于从加工器电路中实现加强加热脱除公开(公告)号：US20090109611A1
公开(公告)日：2009-04-30
申请号：US11930539
申请日：2007-10-31
申请人： William James Anderl , Vincenzo Valentino Di Luoffo , Eric Alan Eckberg , David Roy Motschman , Tamas Visegrady
发明人： William James Anderl , Vincenzo Valentino Di Luoffo , Eric Alan Eckberg , David Roy Motschman , Tamas Visegrady
CPC分类号： H01L23/427 , G06F1/20 , H01L2924/0002 , Y10T29/4935 , H01L2924/00
摘要： A method and computer processor system with anti-tamper capability and thermal packaging structure for implementing enhanced heat removal from processor circuitry, such as, a high-performance cell processor complex, and a design structure on which the subject circuit resides are provided. The computer system includes predefined processor circuits including anti-tamper logic. A volume container substantially contains the predefined processor circuits including the anti-tamper logic. A heat spreader is provided with the predefined processor circuits within the volume container. An external heatsink structure is attached to an outside cover above the volume container. The heatsink structure includes a heatsink base and a plurality of parallel fins extending outwardly from the heatsink base. A heat pipe extending through a folded mesh is attached to the heat spreader within the volume container and is attached to the external heatsink base providing an effective heat removal path for the processor circuits.
摘要翻译： 一种具有防篡改能力和热封装结构的方法和计算机处理器系统，用于实现从诸如高性能单元处理器复合体的处理器电路以及设置有被摄体电路所在的设计结构的增强散热。 计算机系统包括预定义的处理器电路，包括防篡改逻辑。 体积容器基本上包含预定的处理器电路，包括防篡改逻辑。 散热器在容积容器内设置有预定的处理器电路。 外部散热器结构附接到容积容器上方的外部盖子。 散热器结构包括散热器基座和从散热器基座向外延伸的多个平行翅片。 延伸穿过折叠网状物的热管连接到容积容器内的散热器，并附接到外部散热器基座，为处理器电路提供有效的散热路径。
-
公开(公告)号：US20080152127A1
公开(公告)日：2008-06-26
申请号：US11615587
申请日：2006-12-22
CPC分类号： G06F9/5083
摘要： A data processing system, which is particularly useful for carrying out modular multiplication, especially for cryptographic purposes, comprises a plurality of independent, serially connected processing elements which are provided with data in a cyclical fashion via a control mechanism that is capable of transferring data from a set of registers to earlier ones in the series of the serially connected processing elements, at the end of a predetermined number of cycles.
摘要翻译： 特别适用于执行模乘法的数据处理系统，特别是用于加密目的的数字处理系统包括多个独立的串行连接的处理元件，其经由控制机构以循环方式提供数据，该控制机制能够从 一组寄存器到串行连接的处理元件的串联中的较早的寄存器，在预定次数的周期结束。
-
47.发明申请Communications channel interposer, method and program product for verifying integrity of untrusted subsystem responses to a request 失效通信通道插入器，方法和程序产品，用于验证不可信子系统对请求的响应的完整性公开(公告)号：US20070162621A1
公开(公告)日：2007-07-12
申请号：US11260285
申请日：2005-10-27
CPC分类号： G06F11/1608 , G06F11/1616 , G06F11/1625
摘要： In a communications channel coupled to multiple duplicated subsystems, a method, interposer and program product are provided for verifying integrity of subsystem responses. Within the communications channel, a first checksum is calculated with receipt of a first response from a first subsystem responsive to a common request, and a second checksum is calculated for a second response of a second subsystem received responsive to the common request. The first checksum and the second checksum are compared, and if matching, only one of the first response and the second response is forwarded from the communications channel as the response to the common request, with the other of the first response and the second response being discarded by the communications channel.
摘要翻译： 在耦合到多个重复子系统的通信信道中，提供了用于验证子系统响应的完整性的方法，插入器和程序产品。 在通信信道中，响应于公共请求从第一子系统接收到第一响应来计算第一校验和，并且响应于公共请求而接收响应于第二子系统的第二响应的第二校验和。 比较第一校验和和第二校验和，如果匹配，则只有第一响应和第二响应中的仅一个作为对公共请求的响应从通信信道转发，第一响应和第二响应中的另一个为 由通信信道丢弃。
-
公开(公告)号：US08914637B2
公开(公告)日：2014-12-16
申请号：US13592809
申请日：2012-08-23
CPC分类号： H04L9/3247 , H04L2209/38
摘要： A computer method, computer system, and article for enabling digital signature auditing. The method includes the steps of: receiving at least one signature request issued by at least one application, forwarding a first data corresponding to the received at least one signature request to at least one signing entity for subsequent signature of the first data, storing an updated system state that is computed using a function of: i) a reference system state and ii) a second data corresponding to the received at least one signature request, where the reference system state and the updated system state attest to the at least one signature request, and repeating the above steps, using the updated system state as a new reference system state, where the steps of the method are executed at a server of a computerized system.
-
公开(公告)号：US08892892B2
公开(公告)日：2014-11-18
申请号：US13420705
申请日：2012-03-15
CPC分类号： H04L9/3247 , H04L2209/38
摘要： A computer method, computer system, and article for enabling digital signature auditing. The method includes the steps of: receiving at least one signature request issued by at least one application, forwarding a first data corresponding to the received at least one signature request to at least one signing entity for subsequent signature of the first data, storing an updated system state that is computed using a function of: i) a reference system state and ii) a second data corresponding to the received at least one signature request, where the reference system state and the updated system state attest to the at least one signature request, and repeating the above steps, using the updated system state as a new reference system state, where the steps of the method are executed at a server of a computerized system.
摘要翻译： 一种用于启用数字签名审核的计算机方法，计算机系统和文章。 该方法包括以下步骤：接收由至少一个应用发出的至少一个签名请求，将对应于所接收的至少一个签名请求的第一数据转发给至少一个签名实体，以便随后签署第一数据，存储更新的 使用以下功能计算的系统状态：i）参考系统状态，以及ii）对应于接收到的至少一个签名请求的第二数据，其中参考系统状态和更新的系统状态证明至少一个签名请求 ，并且重复上述步骤，使用更新的系统状态作为新的参考系统状态，其中该方法的步骤在计算机化系统的服务器处执行。
-
公开(公告)号：US08613111B2
公开(公告)日：2013-12-17
申请号：US13096381
申请日：2011-04-28
IPC分类号： G06F21/00
CPC分类号： G06F21/86
摘要： Tamper detection circuitry includes a first surface layer surrounding a protected memory, the first surface layer comprising a first plurality of conductive sections; a second surface layer surrounding the protected memory, the second surface layer comprising a second plurality of conductive sections; a programmable interconnect located inside the first surface layer, the programmable interconnect being connected to each conductive section by a plurality of conductive traces, the programmable interconnect being configured to group the conductive section of the first and second plurality of conductive sections into a plurality of circuits, each of the plurality of circuits having a different respective voltage; and a tamper detection module, the tamper detection module configured to detect tampering in the event that a conductive section that is part of a first circuit comes into physical contact with a conductive section that is part of a second circuit.
摘要翻译： 防篡改检测电路包括围绕受保护存储器的第一表面层，第一表面层包括第一多个导电部分; 围绕被保护的存储器的第二表面层，所述第二表面层包括第二多个导电部分; 位于所述第一表面层内部的可编程互连，所述可编程互连通过多个导电迹线连接到每个导电部分，所述可编程互连配置为将所述第一和第二多个导电部分的导电部分分组成多个电路 所述多个电路中的每一个具有不同的相应电压; 以及篡改检测模块，所述篡改检测模块被配置为在作为第一电路的一部分的导电部分与作为第二电路的一部分的导电部分物理接触的情况下检测篡改。
-
-
-
-
-
-
-
-
-
搜索结果
58 条记录 (耗时 0.02 秒)
