Abstract:
A display panel includes a substrate, and a plurality of pixel units arranged on the substrate in an array form and each including a plurality of subpixels. Each subpixel includes a subpixel driving circuitry, a planarization layer and an anode pattern laminated one on another, each anode pattern of at least a part of the subpixels includes a middle portion and a peripheral portion surrounding the middle portion, a groove is formed in a surface of the planarization layer away from the substrate, an orthogonal projection of the groove onto the substrate surrounds an orthogonal projection of the middle portion onto the substrate, and at least a part of an orthogonal projection of the peripheral portion onto the substrate is located within the orthogonal projection of the groove onto the substrate.
Abstract:
A display panel and a display device are provided. The display panel includes: a light transmission region; a display region; a bezel region located between the light transmission region and the display region; a plurality of data lines including a plurality of bezel region data lines and a plurality of display region data lines, and a plurality of gate lines including a plurality of bezel region gate lines and a plurality of display region gate lines, each bezel region gate line includes a first portion, each bezel region data line includes a first portion, an extending direction of the first portion of the bezel region gale line is same as that of the first portion of the bezel region data line, and the first portion of the bezel region gate line overlaps with the first portion of one bezel region data line in a direction perpendicular to the base substrate.
Abstract:
A shift register includes: a first input sub-circuit configured to transmit a first clock signal to a first node in response to an input signal and a first voltage signal; a first output sub-circuit configured to transmit a second voltage signal to a first output signal terminal under control of a voltage of the first node; a second input sub-circuit configured to transmit the input signal to a second node in response to the first clock signal; and, a second output sub-circuit configured to transmit the first voltage signal to the first output signal terminal under control of a voltage of the second node. A voltage value of one of the first voltage signal and the second voltage signal is greater than that of a reference voltage, and a voltage value of another one is less than that of the reference voltage.
Abstract:
A display substrate, a method of forming the same and a display device are provided. The display substrate includes: a base substrate, and a light shielding layer, a first insulating layer, a first metal layer, a second insulating layer and a light emitting device stacked in sequence on the base substrate; where the second insulating layer has a first groove and a second groove, and a portion of the second insulating layer between the first groove and the second groove forms a barrier structure; the first groove is at a side of the barrier structure adjacent to the light emitting device with respect to the second groove; the first metal layer includes a signal line at a side of the first groove away from the barrier structure and a connection terminal at a side of the second groove away from the barrier structure; the light shielding layer includes a connection lead through which the signal line and the connection terminal are electrically connected.
Abstract:
A method and device for compressing and decompressing data information, a drive compensation method and device, and a display device. The method for compressing data information includes: acquiring data information corresponding to a sub pixel unit; establishing a distribution function model according to the data information; obtaining a valid option value section according to the distribution function model and a valid threshold value; and dividing the valid option value section into N compression sections, and compressing data information corresponding to each of the compression sections to M times of data information corresponding to all the sub pixel units according to a storage length P of the data information corresponding to the sub pixel unit to obtain N compressed data information blocks.
Abstract:
The present disclosure provides a voltage drop compensation method, a voltage drop compensation device and a display device. The voltage drop compensation method includes steps of determining a voltage drop for a power signal corresponding to each subpixel set; determining a first equivalent brightness reduction value corresponding to the voltage drop; calculating an initial brightness value for each subpixel in the subpixel set; calculating a sum of the first equivalent brightness reduction value corresponding to the subpixel set and the initial brightness value as a target brightness value for each subpixel in the subpixel set; and generating a driving signal for each subpixel in accordance with the target brightness value for each subpixel in the subpixel set, and outputting the driving signal.
Abstract:
A luminance compensation method and a luminance compensation device of a display device, and the display device are provided. The luminance compensation method of the display device, includes: obtaining an input grayscale value of one of a plurality of sub-pixels corresponding to the display device of an input image, and obtaining a functional relationship between a compensated grayscale value and the input grayscale value corresponding to the sub-pixel; obtaining the compensated grayscale value corresponding to the sub-pixel by using the functional relationship, and performing luminance compensation on the sub-pixel according to the compensated grayscale value; and executing the above operations repeatedly for each of the plurality of sub-pixels of the input image.
Abstract:
A display substrate and a display device. In the display substrate, at least one of the inter-opening region, the first opening peripheral region and the second opening peripheral region includes a first virtual sub-pixel; the first signal line extends along a first direction and includes a first portion passing through the first opening peripheral region, the inter-opening region and the second opening peripheral region; the first portion passes through the first virtual sub-pixel, and the first virtual sub-pixel includes a first compensation capacitor, a first plate of the first compensation capacitor is in a same layer as the first portion of the first signal line and electrically connected with the first portion of the first signal line, and in a same layer as the second plate of the storage capacitor; the second plate is in a different layer from, insulated from, and overlaps with the first plate.
Abstract:
Proposed are a display substrate and a preparation method therefor, and a display apparatus. The display substrate includes a drive circuit layer disposed on a substrate and a light emitting structure layer disposed at a side of the drive circuit layer away from the substrate, the drive circuit layer includes a plurality of circuit units, the light emitting structure layer includes a plurality of light emitting devices; at least one circuit unit includes a first power supply line, an initial signal line including a first initial signal line extending in a first direction and a second initial signal line extending in a second direction, and a pixel drive circuit; the first direction intersects the second direction, and an orthographic projection of the second initial signal line on the substrate overlaps at least partially with an orthographic projection of the first power supply line on the substrate.
Abstract:
A display substrate has a display area and a peripheral area surrounding the display area; the display area includes first and second display sub-areas, and a third display sub-area therebetween; the display substrate includes a base substrate, and a driving circuit layer and multiple light-emitting devices on the base substrate; the driving circuit layer includes multiple pixel driving circuits, a gate driving circuit, and a light emission control circuit; a first electrode of each light-emitting device is electrically coupled to one pixel driving circuit; the multiple pixel driving circuits include first pixel driving circuits for providing driving signals for light-emitting devices in the first display sub-area, and second pixel driving circuits, in the third display sub-area, for providing driving signals for light-emitting devices in the second display sub-area; and the light emission control circuit includes first and second light emission control sub-circuits disconnected from each other.