Abstract:
A detection method of a pixel circuit, a driving method of a display panel, and a display device are disclosed. The pixel circuit includes a driving transistor; and the detection method of the pixel circuit includes: in the first charge cycle, applying a first data voltage to a gate electrode of the driving transistor, acquiring a first sensing voltage at a first electrode of the driving transistor within the first duration after the application of the first data voltage and before the driving transistor is switched off, and determining whether the first sensing voltage is equal to reference sensing voltage.
Abstract:
A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. At least one sub-pixel includes a storage capacitor. The storage capacitor includes a second capacitor electrode, a first capacitor electrode and a third capacitor electrode which are sequentially on the base substrate. The first capacitor electrode has a first capacitor electrode side and a second capacitor electrode side opposite to each other in the second direction, and the second capacitor electrode has a third capacitor electrode side and a fourth capacitor electrode side opposite to each other in the second direction; orthographic projections of the first capacitor electrode side and the second capacitor electrode side on the base substrate are between an orthographic projection of the third capacitor electrode side and an orthographic projection of the fourth capacitor electrode side on the base substrate.
Abstract:
A method includes: setting target white color coordinates, a target white luminance and a gamma value; calculating a first luminance value of each primary color at each gray scale; measuring color coordinates of the primary color at each gray scale, and generating a list of a correspondence among the gray scale, the first luminance value and the color coordinates of the primary color; selecting a plurality of gray scales, and obtaining color coordinates corresponding to one of the plurality of gray scales; calculating a second luminance value of the primary color at each of the plurality of gray scales; and obtaining and storing a luminance correction relationship of the primary color according to the second luminance value of the primary color at each of the plurality of gray scales and the first luminance values corresponding to each of the plurality of gray scales.
Abstract:
The application provides a pixel driving method, a pixel driving device and a display device. The method includes steps of: obtaining a brightness sum of a frame according to a brightness of each of pixels in the frame; inquiring a data voltage compensation value corresponding to the obtained brightness sum from a preset first correspondence relationship, the first correspondence relationship including a one-to-one correspondence relationship between the brightness sum and the data voltage compensation value for one frame; compensating a data voltage of the frame according to the data voltage compensation value to generate a compensated data voltage; and outputting the compensated data voltage to a display panel.
Abstract:
An Active-Matrix Organic Light Emitting Diode (AMOLED) display apparatus and a brightness compensation method thereof are provided. At an initial compensation stage, a display screen can be subjected to brightness calibration by an image sensor so as to acquire a data voltage compensation value of each sub-pixel when a brightness value of a display panel equals a preset value, a first data voltage is output to a corresponding pixel circuit according to the data voltage compensation value of each sub-pixel, a sensed voltage of each sub-pixel at this stage is used as an initial reference voltage of each sub-pixel when the brightness value of the display panel equals the preset value; and at a subsequent compensation stage, by regulating a data voltage of each sub-pixel, the sensed voltage of each sub-pixel is made to be equal to the corresponding initial reference voltage when the brightness value of the display panel equals the preset value, so as to achieve uniform compensation on brightness of each sub-pixel at the subsequent compensation stage. Thus, not only are uniformity and accuracy of initial brightness compensation improved, but also pixel aging is accurately compensated and uniformity and accuracy of subsequent compensation are improved.
Abstract:
The present disclosure provides an array substrate, a method of producing the same and a display apparatus. The array substrate comprises: N rows of scan lines, N being a natural number; M columns of data lines, which are arranged to cross with the N rows of scan lines, M being a natural number; a display array comprising N×M pixel units defined by the N rows of scan lines and the M columns of data lines; and N columns of leading wires electrically connected to the N rows of scan lines respectively and led out in parallel to the M columns of data lines. It may narrow the frame of the display apparatus.
Abstract:
The present invention provides an array substrate and a manufacturing method thereof. The array substrate of the present invention comprises multiple pixel units arranged in an array, each pixel unit comprising a substrate, an active layer, a source layer and a drain layer arranged in the same layer, and a gate layer; wherein each pixel unit further comprises a power wire layer connected to the source layer via a via hole. Since the power wire layer of the present invention is separately provided as a layer, the area of the projection of the power wire layer on the substrate may be larger, that is, the conductive cross-sectional area of the power wire layer may be larger, and thus the resistance of the power wire layer is decreased. Therefore, difference among currents of different pixel units is reduced, and thus the mura phenomenon generated in displaying is alleviated.
Abstract:
An OLED pixel circuit includes a data storage and threshold compensation module, a switch module, a driving module, and a light-emitting module. The data storage and threshold compensation module is connected to the driving module, the switch module, a scanning signal line, and a data signal line, respectively, and is used for inputting a data signal on the data signal line to the driving module and compensating a threshold voltage of the driving module according to a scanning signal of the scanning signal line. The switch module is connected to the driving module, the light-emitting module, and a light emission control signal line, respectively, and is used for inputting the data signal provided by the threshold-compensated driving module to the light-emitting module according to a control signal of the light emission control signal line, so that the light-emitting module is driven to emit light.
Abstract:
A display panel includes: a substrate, including a display area and a peripheral area surrounding the display area; an auxiliary electrode layer, located on a side of the substrate, where the auxiliary electrode layer includes an auxiliary electrode in the display area and a connection portion in the peripheral area; and a data line layer, including multiple data lines in the display area and a peripheral line portion in the peripheral area; where in the display area, the multiple data lines and the auxiliary electrode are provided in a same layer; and where in the peripheral area, the peripheral line portion and the connection portion are provided in a same layer.
Abstract:
An array substrate includes: a substrate, at least one gate driving circuit and at least one clock signal line that are located on a same side of the substrate. The gate driving circuit includes a plurality of cascaded shift registers located in different rows, the plurality of shift registers are divided into at least two groups of shift registers, each group of shift registers includes at least one shift register, located in a same column. A gate driving circuit in the at least one gate driving circuit corresponds to at least one clock signal line. The clock signal line includes a main body transmission section configured to transmit a clock signal, and at least two branch transmission sections connected to the main body transmission section. Each branch transmission section is connected to a clock signal input terminal of each shift register in a respective group of shift registers.