PIXEL CIRCUIT, METHOD OF DRIVING THE SAME, AGING DETECTION METHOD AND DISPLAY PANEL

    公开(公告)号:US20210125533A1

    公开(公告)日:2021-04-29

    申请号:US17010613

    申请日:2020-09-02

    Abstract: A pixel circuit includes a data written-in sub-circuit, a driving sub-circuit, a threshold compensation sub-circuit, a light-emitting element, a sensing sub-circuit and a first light-emission control sub-circuit. The driving sub-circuit is configured to control a driving current for driving the light-emitting element to emit light. The data written-in sub-circuit writes threshold compensation information into a second terminal of the driving sub-circuit at a compensation stage. The threshold compensation sub-circuit stores a data signal and adjusts a voltage at the second terminal of the driving sub-circuit in a coupled manner. The sensing sub-circuit writes a sensing voltage into a first terminal and the second terminal of the driving sub-circuit at a display process, senses aging information of the light-emitting element during an aging detection process and transmits the aging information to the aging detection device.

    GATE-ON-ARRAY DRIVING UNIT, GATE-ON-ARRAY DRIVING METHOD, GATE-ON-ARRAY DRIVING CIRCUIT, AND DISPLAY DEVICE
    57.
    发明申请
    GATE-ON-ARRAY DRIVING UNIT, GATE-ON-ARRAY DRIVING METHOD, GATE-ON-ARRAY DRIVING CIRCUIT, AND DISPLAY DEVICE 审中-公开
    GATE-ON-ARRAY驱动单元,GATE-ON-ARRAY驱动方法,GATE-ON-ARRAY驱动电路和显示装置

    公开(公告)号:US20160293090A1

    公开(公告)日:2016-10-06

    申请号:US14778039

    申请日:2015-03-23

    Abstract: GOA driving unit includes an input end, a starting module, a control module, an output module and a gate driving signal output end. The starting module is configured to, within a starting time period, input a triggering signal from the input end into the control module under the control of a first clock signal. The control module is configured to, within an output time period, output a second clock signal to the output module. The output module is configured to output a first level to the gate driving signal output end within the starting time period, output the second clock signal to the gate driving signal output end within the output time period, and output the first level to the gate driving signal output end within a maintenance time period. The first clock signal is of a phase reverse to the second clock signal.

    Abstract translation: GOA驱动单元包括输入端,起动模块,控制模块,输出模块和门驱动信号输出端。 启动模块被配置为在起始时间段内,在第一时钟信号的控制下,将来自输入端的触发信号输入到控制模块中。 控制模块被配置为在输出时间段内向输出模块输出第二时钟信号。 输出模块被配置为在开始时间周期内向门驱动信号输出端输出第一电平,在输出时间周期内将第二时钟信号输出到门驱动信号输出端,并将第一电平输出到门驱动 信号输出端在维护期内。 第一时钟信号是与第二时钟信号相反的相位。

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