High performance raid-6 system architecture with pattern matching
    53.
    发明授权
    High performance raid-6 system architecture with pattern matching 有权
    具有模式匹配的高性能raid-6系统架构

    公开(公告)号:US07664915B2

    公开(公告)日:2010-02-16

    申请号:US11642315

    申请日:2006-12-19

    IPC分类号: G06F12/00

    CPC分类号: G06F11/1076 G06F2211/1057

    摘要: An acceleration unit offloads computationally intensive tasks from a processor. The acceleration unit includes two data processing paths each having an Arithmetic Logical Unit and sharing a single multiplier unit. Each data processing path may perform configurable operations in parallel on a same data. Special multiplexer paths and instructions are provided to allow P and Q type syndromes to be computed on a stripe in a single-pass of the data through the acceleration unit.

    摘要翻译: 加速单元从处理器卸载计算密集型任务。 加速单元包括两个数据处理路径,每个数据处理路径均具有算术逻辑单元并且共享单个乘法器单元。 每个数据处理路径可以在相同的数据上并行地执行可配置的操作。 提供特殊的多路复用器路径和指令以允许通过加速单元在数据的单程中在条带上计算P和Q型综合征。

    DELAYED LINK COMPRESSION SCHEME
    55.
    发明申请

    公开(公告)号:US20190042496A1

    公开(公告)日:2019-02-07

    申请号:US16140472

    申请日:2018-09-24

    摘要: Apparatus, systems and methods for implementing delayed decompression schemes. As a burst of packets comprising compressed packets and uncompressed packets are received over an interconnect link, they are buffered in a receive buffer without decompression. Subsequently, the packets are forwarded from the receive buffer to a consumer such as processor core, with the compressed packets being decompressed prior to reaching the processor core. Under a first delayed decompression approach, packets are decompressed when they are read from the receive buffer in conjunction with forwarding the uncompressed packet (or uncompressed data contained therein) to the consumer. Under a second delayed decompression scheme, the packets are read from the receive buffer and forwarded to a decompressor using a first datapath width matching the width of the packets, decompressed, and then forwarded to the consumer using a second datapath width matching the width of the uncompressed data.

    METHOD AND APPARATUS FOR GENERIC MULTI-STAGE NESTED HASH PROCESSING
    57.
    发明申请
    METHOD AND APPARATUS FOR GENERIC MULTI-STAGE NESTED HASH PROCESSING 失效
    用于通用多级嵌入式处理的方法和装置

    公开(公告)号:US20090141887A1

    公开(公告)日:2009-06-04

    申请号:US11949767

    申请日:2007-12-03

    IPC分类号: H04L9/28

    摘要: A generic multi-stage nested hash unit that provides support for generic, multi-stage nested hashes accelerates a wide range of security algorithms and protocols. The supported security algorithms and protocols include SSL v3 MAC, TLS PRF, and SSL v3 Key Material Generation. The hash unit allows the same code to be used to generate the MAC even when the MAC algorithms are different, for example, for SSL and TLS protocols.

    摘要翻译: 通用的多阶嵌套散列单元提供对通用多级嵌套散列的支持,可加速各种安全算法和协议。 支持的安全算法和协议包括SSL v3 MAC,TLS PRF和SSL v3密钥生成。 散列单元允许使用相同的代码来生成MAC,即使MAC算法不同,例如对于SSL和TLS协议也是如此。

    DATA STORAGE IN PERSISTENT MEMORY
    59.
    发明申请
    DATA STORAGE IN PERSISTENT MEMORY 审中-公开
    数据存储在存储器中

    公开(公告)号:US20150089245A1

    公开(公告)日:2015-03-26

    申请号:US14038295

    申请日:2013-09-26

    IPC分类号: G06F12/14 G06F21/60

    摘要: Embodiments include systems, methods, and apparatuses associated with storing data in a persistent memory are disclosed herein. In embodiments, a memory controller may be configured to encrypt data with an encryption key, and the encrypted data may be stored in persistent memory. The memory controller may be further configured to alter and/or destroy the encryption key in response to a reset event. Other embodiments may be disclosed and/or claimed.

    摘要翻译: 本文公开的实施例包括与在永久存储器中存储数据相关联的系统,方法和装置。 在实施例中,存储器控制器可以被配置为用加密密钥加密数据,并且加密的数据可以被存储在持久存储器中。 存储器控制器可以被进一步配置为响应于重置事件而改变和/或销毁加密密钥。 可以公开和/或要求保护其他实施例。

    Method and apparatus for generic multi-stage nested hash processing
    60.
    发明授权
    Method and apparatus for generic multi-stage nested hash processing 失效
    通用多级嵌套散列处理方法和装置

    公开(公告)号:US08363827B2

    公开(公告)日:2013-01-29

    申请号:US11949767

    申请日:2007-12-03

    IPC分类号: H04K1/00

    摘要: A generic multi-stage nested hash unit that provides support for generic, multi-stage nested hashes accelerates a wide range of security algorithms and protocols. The supported security algorithms and protocols include SSL v3 MAC, TLS PRF, and SSL v3 Key Material Generation. The hash unit allows the same code to be used to generate the MAC even when the MAC algorithms are different, for example, for SSL and TLS protocols.

    摘要翻译: 通用的多阶嵌套散列单元提供对通用多级嵌套散列的支持,可加速各种安全算法和协议。 支持的安全算法和协议包括SSL v3 MAC,TLS PRF和SSL v3密钥生成。 散列单元允许使用相同的代码来生成MAC,即使MAC算法不同,例如对于SSL和TLS协议也是如此。