公开(公告)号：US20220197833A1

公开(公告)日：2022-06-23

申请号：US17159487

申请日：2021-01-27

Applicant: Micron Technology, Inc.

Inventor： Joseph H. Steinmetz ,  Luca Bert ,  William Akin

IPC: G06F13/16 ,  G06F11/07 ,  G06F13/42

Abstract: A host command is received to configure a system to have a configuration designating an interface standard for exposing a storage element and a persistent memory region (PMR). The storage element is visible to a first protocol of the interface standard and the PMR is visible to a second protocol of the interface standard. The storage element is implemented on a first memory device of the system including a non-volatile memory device and the PMR is implemented on a second memory device of the system. The system is configured in accordance with the configuration.

公开(公告)号：US20220188178A1

公开(公告)日：2022-06-16

申请号：US17117292

申请日：2020-12-10

Applicant: Micron Technology, Inc.

Inventor： Luca Bert ,  Joseph H. Steinmetz

IPC: G06F11/07 ,  G06F11/30 ,  G06F3/06

Abstract: A system includes a plurality of nodes, a first memory device including a plurality of volumes each visible to at least one of the plurality of nodes within a visibility configuration, and a processing device, operatively coupled with the plurality of nodes and the first memory device. The processing device performs operations including identifying a system failure affecting visibility of at least one of the plurality of volumes of the first memory device, and modifying the visibility configuration to address the system failure.

公开(公告)号：US20210157720A1

公开(公告)日：2021-05-27

申请号：US16695481

申请日：2019-11-26

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F12/02 ,  G06F12/0844 ,  G06F3/06

Abstract: A processing device in a memory sub-system identifies a first memory device and a second memory device and configures the second memory device with a zone namespace. The processing device identifies a first portion and a second portion of the first memory device, the first portion storing zone namespace metadata corresponding to the zone namespace on the second memory device. The processing device further exposes the second portion of the first memory device to a host system as a non-zoned addressable memory region.

公开(公告)号：US20250150412A1

公开(公告)日：2025-05-08

申请号：US19019293

申请日：2025-01-13

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: H04L49/00 ,  H04L49/103 ,  H04L49/90 ,  H04L67/1097

Abstract: A memory sub-system connectable to a microprocessor to provide network storage services. The memory sub-system has a random-access memory configured with: first queues for the microprocessor and a network interface; second queues for the microprocessor and a processing device; and third queues for the processing device and a storage device. The processing device is configured to: generate first control messages and first data messages from packets received by the network interface; place the first control messages into the first queues for the microprocessor; and place the first data messages into the third queues for the storage device. The microprocessor processes the first control messages to implement security and administrative functions and place second control messages in the second queues. The storage device is configured to retrieve the first data messages from the third queues and second control messages from the second queues for processing.

公开(公告)号：US20250147827A1

公开(公告)日：2025-05-08

申请号：US19014559

申请日：2025-01-09

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F9/54 ,  G06F13/16

Abstract: A storage product having: a network interface operable on a computer network; a bus connector adapted to be connected to a computer bus; a storage device having a storage capacity accessible through network storage services provided over the network interface; and a processing device configured to at least generate storage access messages from incoming packets received by the network interface from the computer network. The storage product is operable in a standalone mode when no local host system is connected to the bus connector to control the storage product and operable in a slave mode when a local host system is connected to the bus connector to process a portion of the storage access messages.

公开(公告)号：US20250021268A1

公开(公告)日：2025-01-16

申请号：US18770951

申请日：2024-07-12

Applicant: Micron Technology, Inc.

Inventor： Luca Bert ,  Sampath Ratnam

IPC: G06F3/06

Abstract: Various embodiments provide for performing one or more data read-ahead operations on a memory system based on a read size and a queue identifier of a read request. In particular, a memory system of some embodiments is configured to perform at least one read-ahead operation when an individual read request, received from a host system in association with a queue identifier, has a read size equal to a maximum data transfer size (MDTS) of the memory system.

公开(公告)号：US20250021251A1

公开(公告)日：2025-01-16

申请号：US18898519

申请日：2024-09-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Luca Bert

IPC: G06F3/06

Abstract: A system includes one or more memory devices and a processing device coupled to the memory device(s) to perform operations including transmitting, to a host system, a size of each respective zone at the one or more memory devices. The operations include receiving, from the host system, an indication of a defined size of each respective zone group of the one or more memory devices. The operations include allocating one or more zones at the one or more memory devices to a zone group based on the defined size of the zone group received from the host system. The operations include programming one or more host data items and one or more parity data items to a zone group identified by a common zone group identifier for the one or more host data items and the one or more parity data items.

公开(公告)号：US12197772B2

公开(公告)日：2025-01-14

申请号：US17208653

申请日：2021-03-22

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F3/06

Abstract: Host data associated with a first region of a memory device is identified. The host data is stored in a buffer, and the first region of the memory device is designated as open. The host data is padded to a predetermined size and written to the first region of the memory device. A context associated with the first region of the memory device is updated. The first region of the memory device is designated as closed.

公开(公告)号：US20250013570A1

公开(公告)日：2025-01-09

申请号：US18439647

申请日：2024-02-12

Applicant: Micron Technology, Inc.

Inventor： Luca Bert

IPC: G06F12/0815

Abstract: Techniques to improve performance of loading data from memory addresses implemented in a storage capacity of a memory sub-system. A connection from the memory sub-system to a host system supports both a protocol for cache-coherent memory access to a memory device implemented in the storage capacity and a protocol for storage access. A cache memory is used in the memory sub-system to cache pages of the memory device for accessing over the connection. The host system can enter hints about future memory accesses in a storage access queue, which can be configured in the memory device, or a memory of the host system. Based on the hints the memory sub-system can prefetch pages from the storage capacity into the cache memory for improved performance in servicing requests from the host system to load data from the memory device.

公开(公告)号：US20240419345A1

公开(公告)日：2024-12-19

申请号：US18821038

申请日：2024-08-30

Applicant: Micron Technology, Inc.

Inventor： Luca Bert ,  Joseph Harold Steinmetz

IPC: G06F3/06

Abstract: An apparatus with a solid state drive (SSD) configured to manage storage resources for proof of space activities. The SSD has a host interface configured to receive at least read commands and write commands from an external host system. The SSD has memory cells formed on at least one integrated circuit die, and a processing device configured to control executions of the read commands and the write commands. In response to an indication of a storage space request for the host system, the apparatus identifies a portion of storage resources used to store the data of the proof of space plot, and reallocates the portion to service the host system. Subsequently, the SSD can continue proof of space activities based on the proof of space plot using the data stored in a remaining portion of the storage resources initially allocated to the proof of space plot.