公开(公告)号：US11729398B2

公开(公告)日：2023-08-15

申请号：US17355596

申请日：2021-06-23

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Masato Ohkawa ,  Hideo Saitou ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/159 ,  H04N19/12 ,  H04N19/176 ,  H04N19/61 ,  H04N19/625

CPC classification number: H04N19/159 ,  H04N19/12 ,  H04N19/176 ,  H04N19/61 ,  H04N19/625

Abstract: When intra prediction is to be used, an encoder determines whether an adaptive basis selection mode is to be used and whether a size of the current block matches a determined size. When the adaptive basis selection mode is to be used and the size matches the determined size, the encoder fixes the first transform basis for the current block to a first determined transform basis in the adaptive basis selection mode, and generates first transform coefficients by performing first transform of residual signals of the current block using the first determined transform basis; quantizes the first transform coefficients when an intra prediction mode for the current block is a determined mode; and generates second transform coefficients by performing second transform of the first transform coefficients using a second transform basis, and quantizes the second transform coefficients, when the intra prediction mode is not the determined mode.

公开(公告)号：US11722684B2

公开(公告)日：2023-08-08

申请号：US17408315

申请日：2021-08-20

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Sughosh Pavan Shashidhar ,  Ru Ling Liao ,  Hai Wei Sun ,  Han Boon Teo ,  Jing Ya Li ,  Kiyofumi Abe ,  Tadamasa Toma ,  Takahiro Nishi

IPC: H04N19/44 ,  H04N19/119 ,  H04N19/137 ,  H04N19/159 ,  H04N19/176

CPC classification number: H04N19/44 ,  H04N19/119 ,  H04N19/137 ,  H04N19/159 ,  H04N19/176

Abstract: An image decoder has circuitry coupled to a memory. The circuitry splits a current image block into a plurality of partitions. The circuitry predicts a first motion vector from a set of uni-prediction motion vector candidates for a first partition of the plurality of partitions, and decodes the first partition using the first motion vector.

公开(公告)号：US11716473B2

公开(公告)日：2023-08-01

申请号：US17886275

申请日：2022-08-11

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Ryuichi Kanoh ,  Takahiro Nishi ,  Tadamasa Toma

IPC: H04N19/126 ,  H04N19/176 ,  H04N19/18 ,  H04N19/60 ,  H04N19/30 ,  H04N19/124

CPC classification number: H04N19/126 ,  H04N19/124 ,  H04N19/176 ,  H04N19/18 ,  H04N19/30 ,  H04N19/60

Abstract: Various embodiments provide an encoder that performs an up-conversion and a down-conversion on a first quantization matrix to generate a second quantization matrix, and quantizes transform coefficients of a current block using the second quantization matrix. The first quantization matrix has a first number of rows and a first number of columns equal to the first number of rows, and the second quantization matrix has a second number of rows and a second number of columns different from the second number of rows. In the up-conversion, the circuitry generates the second quantization matrix such that one of the second number of rows or the second number of columns is larger than the first number of rows. In the down-conversion, the circuitry generates the second quantization matrix such that the other of the second number of rows or the second number of columns is smaller than the first number of rows.

公开(公告)号：US11716470B2

公开(公告)日：2023-08-01

申请号：US17583768

申请日：2022-01-25

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Chong Soon Lim ,  Hai Wei Sun ,  Jing Ya Li ,  Han Boon Teo ,  Che-Wei Kuo ,  Chu Tong Wang ,  Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/117 ,  H04N19/132 ,  H04N19/169 ,  H04N19/82

CPC classification number: H04N19/117 ,  H04N19/132 ,  H04N19/188 ,  H04N19/82

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: encodes information for deriving a parameter into a header of a bitstream; filters reconstructed samples in a first image using a filtering process, to generate a second image; determines whether the parameter has a predefined value; encodes a third image using the second image when the parameter has the predefined value; and encodes the third image using the first image when the parameter does not have the predefined value.

公开(公告)号：US11700375B2

公开(公告)日：2023-07-11

申请号：US17564510

申请日：2021-12-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Yusuke Kato

IPC: H04N19/13 ,  H04L65/70 ,  H04L65/75 ,  H04N19/176 ,  H04N19/184 ,  H04N19/70

CPC classification number: H04N19/13 ,  H04L65/70 ,  H04L65/75 ,  H04N19/176 ,  H04N19/184 ,  H04N19/70

Abstract: An encoder includes memory and circuitry which: (i) encodes an image block; (ii) when encoding the image block: binarizes coefficient information indicating coefficients of the image block; and controls whether to apply arithmetic encoding to a binary data string obtained by binarizing the coefficient information; and (iii) when binarizing the coefficient information: binarizes the coefficient information according to a first syntax structure when arithmetic encoding is applied to the data string and a predetermined condition is not satisfied; binarizes the coefficient information according to a second syntax structure when arithmetic encoding is applied to the data string and the predetermined condition is satisfied; binarizes the coefficient information according to the second syntax structure when no arithmetic encoding is applied to the data string; and subtracts 1 from a value of an initial non-zero coefficient when no arithmetic encoding is applied to the data string when encoding the image block.

公开(公告)号：US11671617B2

公开(公告)日：2023-06-06

申请号：US17828658

申请日：2022-05-31

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Ryuichi Kanoh

IPC: H04N19/593 ,  H04N19/513 ,  H04N19/176 ,  H04N19/182 ,  H04N19/196

CPC classification number: H04N19/513 ,  H04N19/176 ,  H04N19/182 ,  H04N19/196

Abstract: An encoder is an encoder that encodes a block in a picture using a prediction image of the block, and includes circuitry and memory. Using the memory, the circuitry: calculates a first average pixel value which is an average pixel value of first reference samples out of the first reference samples and second reference samples, The first reference samples are referable and located outside the block and adjacent to a first side of the block. The second reference samples are referable and located outside the block and adjacent to a second side of the block. When generating the prediction image, the circuitry applies the same prediction pixel value to inner samples among current samples to be processed that are included in the block. The inner samples constitute a quadrilateral region including at least two current samples in each of a horizontal direction and a vertical direction.

公开(公告)号：US11671615B2

公开(公告)日：2023-06-06

申请号：US17117837

申请日：2020-12-10

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe

IPC: H04N19/51 ,  H04N19/176

CPC classification number: H04N19/51 ,  H04N19/176

Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry: in an inter prediction mode in which an affine motion vector is calculated for each of sub-blocks constituting a current block of a picture in the video, based on motion vectors of neighboring blocks of the current block, changes a shape or size of the sub-block according to a variation in direction or variation in magnitude among the motion vectors of the neighboring blocks; calculates the affine motion vector for the sub-block having the shape or size changed; and performs the motion compensation for the sub-block having the shape or size changed.

公开(公告)号：US11671593B2

公开(公告)日：2023-06-06

申请号：US17488640

申请日：2021-09-29

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Ryuichi Kanoh ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Takashi Hashimoto

IPC: H04N19/117 ,  H04N19/14 ,  H04N19/176 ,  H04N19/196

CPC classification number: H04N19/117 ,  H04N19/14 ,  H04N19/176 ,  H04N19/196

Abstract: An encoder includes processing circuitry and memory. Using the memory, the processing circuitry: encodes and reconstructs an image to generate a reconstructed image; determines, according to a characteristic of a block in the reconstructed image, an interpolation method for interpolating pixels located outside a referable region including the block; interpolates the pixels located outside the referable region, using the interpolation method determined; and applies a filter to the block using the pixels interpolated.

公开(公告)号：US11665370B2

公开(公告)日：2023-05-30

申请号：US17379302

申请日：2021-07-19

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Virginie Drugeon ,  Tadamasa Toma ,  Takahiro Nishi ,  Kiyofumi Abe ,  Yusuke Kato

IPC: H04N19/70 ,  H04N19/169 ,  H04N19/423 ,  H04N19/46

CPC classification number: H04N19/70 ,  H04N19/188 ,  H04N19/423 ,  H04N19/46

Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: writes, into a sequence parameter set which is header information of a sequence, video usability information syntax which is information for realizing an additional function in display of an image, and syntax different from the video usability information syntax. The syntax includes at least one parameter related to display timing of the image.

公开(公告)号：US11616977B2

公开(公告)日：2023-03-28

申请号：US17473479

申请日：2021-09-13

Applicant: Panasonic Intellectual Property Corporation of America

Inventor： Kiyofumi Abe ,  Takahiro Nishi ,  Tadamasa Toma ,  Ryuichi Kanoh

IPC: H04N19/537 ,  H04N19/105 ,  H04N19/157 ,  H04N19/52 ,  H04N19/573

Abstract: An encoder includes memory and circuitry. The circuitry: derives a first motion vector in a unit of a prediction block using a first inter frame prediction mode that uses a degree of matching between two reconstructed images of two regions in two difference pictures, the prediction block being obtained by splitting an image included in a video; and performs, in the unit of the prediction block, a first motion compensation process that generates a prediction image by referring to a spatial gradient of luminance in an image generated by performing motion compensation using the first motion vector derived.