METHOD FOR PERFORMING LOGIC BUILT-IN-SELF-TEST CYCLES ON A SEMICONDUCTOR CHIP AND A CORRESPONDING SEMICONDUCTOR CHIP WITH A TEST ENGINE
    51.
    发明申请
    METHOD FOR PERFORMING LOGIC BUILT-IN-SELF-TEST CYCLES ON A SEMICONDUCTOR CHIP AND A CORRESPONDING SEMICONDUCTOR CHIP WITH A TEST ENGINE 审中-公开
    用于在半导体芯片上执行逻辑内置自测试循环的方法和与测试引擎相关的半导体芯片

    公开(公告)号:US20090228751A1

    公开(公告)日:2009-09-10

    申请号:US12125476

    申请日:2008-05-22

    IPC分类号: G01R31/3177 G06F11/25

    摘要: A method, structure and design system for performing logic built-in-self-test (LBIST) cycles on a semiconductor chip with a plurality of logic circuits and a plurality of storage elements connected serially to a number of LBIST stumps (pattern segments) between a pseudo-random-pattern generator (30) and a multiple-input-signature register. The semiconductor chip is subdivided into partitions, such that LBIST cycles may be run separately or in parallel for one or more partitions. The LBIST cycles may also be run separately or in parallel inter-connections between the partitions. The partitions to be tested are controlled by at least one corresponding clock signal, and the inter-connections to be tested are controlled by at least one corresponding clock signal.

    摘要翻译: 一种用于在半导体芯片上执行逻辑内置自检(LBIST)周期的方法,结构和设计系统,其具有多个逻辑电路和多个存储元件,所述多个逻辑电路和多个存储元件串联连接到多个LBIST树桩(图案段)之间, 伪随机模式生成器(30)和多输入签名寄存器。 半导体芯片被细分为分区,使得LBIST周期可以针对一个或多个分区单独运行或并行运行。 LBIST循环也可以分开运行或在分区之间并行连接。 要测试的分区由至少一个对应的时钟信号控制,并且待测试的互连由至少一个相应的时钟信号控制。

    Apparatus for accelerating through-the-pins LBIST simulation
    52.
    发明授权
    Apparatus for accelerating through-the-pins LBIST simulation 失效
    用于加速通过引脚LBIST模拟的装置

    公开(公告)号:US07478304B2

    公开(公告)日:2009-01-13

    申请号:US11936921

    申请日:2007-11-08

    IPC分类号: G01R31/28

    CPC分类号: G06F17/5022 G01R31/318357

    摘要: The present invention provides an apparatus and a computer program product for applying external clock and data patterns for TTP-LBIST. A simulation model for the logic under test is set up in a simulator. Next, a user sets up an external LBIST block, which comprises pre-verified internal clock and data pattern logic, and connects this block to the logic in the simulation model. The internal clock and data pattern logic provides the input patterns used in OPCG modes of LBIST. This internal clock and data pattern logic is already verified through the design effort. Therefore, the internal pattern generators become the external pattern generators in the simulation model. The external LBIST block applies the external clock and data patterns, and subsequently, the user receives and processes these output patterns to determine if the logic operates correctly.

    摘要翻译: 本发明提供一种用于对TTP-LBIST应用外部时钟和数据模式的装置和计算机程序产品。 在仿真器中设置了被测逻辑的仿真模型。 接下来,用户设置外部LBIST块,其包括预先验证的内部时钟和数据模式逻辑,并将该块连接到仿真模型中的逻辑。 内部时钟和数据模式逻辑提供了用于LBIST的OPCG模式的输入模式。 该内部时钟和数据模式逻辑已经通过设计工作进行了验证。 因此,内部模式发生器成为模拟模型中的外部模式发生器。 外部LBIST块应用外部时钟和数据模式,随后用户接收并处理这些输出模式以确定逻辑是否正常工作。

    Pre-Mortem Waveform Trace Generation for Hardware Description Language Simulators
    53.
    发明申请
    Pre-Mortem Waveform Trace Generation for Hardware Description Language Simulators 审中-公开
    硬件描述语言模拟器的先验波形跟踪生成

    公开(公告)号:US20080141071A1

    公开(公告)日:2008-06-12

    申请号:US11608911

    申请日:2006-12-11

    IPC分类号: G06F11/34

    CPC分类号: G06F11/3476 G06F17/5022

    摘要: A computer implemented method, system and computer program product for providing a waveform trace of a last plurality of cycles of a simulation prior to occurrence of an error in the simulation. A computer implemented method in a data processing system for providing a waveform trace for a last plurality of cycles of a simulation prior to occurrence of an error in the simulation includes storing history information relating to a last plurality of cycles of a simulation during running of the simulation. Responsive to an error occurring in the simulation, the simulation is stopped, and a waveform trace for the last plurality of cycles of the simulation is provided using the stored history information.

    摘要翻译: 一种计算机实现的方法,系统和计算机程序产品,用于在模拟中发生错误之前提供模拟的最后多个循环的波形轨迹。 数据处理系统中的计算机实现的方法,用于在仿真发生之前的模拟的最后多个循环中提供波形轨迹,包括存储关于模拟运行期间最后多个周期的历史信息 模拟。 响应于仿真中发生的错误,停止仿真,并且使用存储的历史信息提供用于模拟的最后多个周期的波形跟踪。