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公开(公告)号:US11303913B2
公开(公告)日:2022-04-12
申请号:US16903996
申请日:2020-06-17
Applicant: QUALCOMM Incorporated
Inventor: Vadim Seregin , Muhammed Zeyd Coban , Adarsh Krishnan Ramasubramonian
IPC: H04N19/423 , H04N19/136 , H04N19/172 , H04N19/103 , H04N19/503 , H04N19/70
Abstract: A video decoder is configured to remove pictures from a decoded picture buffer based on the value of an explicitly coded syntax element. A video decoder may be configured to decode a syntax element indicating a picture to remove from a decoded picture buffer, and remove the first picture from the DPB. The video decoder may then decode a current picture, and store the decoded current picture in the DPB.
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52.
公开(公告)号:US11284075B2
公开(公告)日:2022-03-22
申请号:US16567966
申请日:2019-09-11
Applicant: QUALCOMM Incorporated
Inventor: Hilmi Enes Egilmez , Nan Hu , Vadim Seregin , Wei-Jung Chien , Marta Karczewicz
IPC: H04N19/117 , H04N19/176 , H04N19/70 , H04N19/503
Abstract: A device for decoding video data includes a memory configured to store video data and one or more processors implemented in circuitry and configured to store sets of adaptive loop filter (ALF) parameters in a one-dimensional array in the memory, the one-dimensional array having a predefined size of N memory elements, N being a positive integer value, wherein the one or more processors are configured to store, in one or more of the memory elements of the array, both corresponding ALF parameters and a temporal layer identifier (ID) value indicating a temporal layer from which the corresponding ALF parameters are to be estimated; decode one or more blocks of the video data; and filter the one or more blocks using the ALF parameters of the one-dimensional array. The device may further encode the one or more blocks prior to decoding the one or more blocks.
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公开(公告)号:US11233988B2
公开(公告)日:2022-01-25
申请号:US16874091
申请日:2020-05-14
Applicant: QUALCOMM Incorporated
Inventor: Vadim Seregin , Muhammed Zeyd Coban
IPC: H04N19/105 , H04N19/132 , H04N19/159 , H04N19/176
Abstract: An example device for coding video data determines a first reference block in a first reference picture for a first block of a current picture. Based on the first reference picture being a different size than the current picture, the device codes the first block with a first inter-coding tool of a first set of inter-coding tools, wherein a first particular tool of a plurality of inter-coding tools is disabled. The device determines a second reference block in a second reference picture for a second block of the current picture. Based on the second reference picture being the same size as the current picture, the device codes the second block with a second inter-coding tool of a second set of inter-coding tools, wherein the first particular tool is enabled.
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公开(公告)号:US11206413B2
公开(公告)日:2021-12-21
申请号:US16991448
申请日:2020-08-12
Applicant: QUALCOMM Incorporated
Inventor: Yung-Hsuan Chao , Vadim Seregin , Marta Karczewicz
IPC: H04N19/176 , H04N19/169 , H04N19/174
Abstract: Systems, methods, and computer-readable storage media for maintaining palette predictors for palette coding are described. An example method can include determining a current palette coding block of a single tree coded slice of a picture is encoded according to a local dual tree; determining, after an update of a palette predictor associated with the current palette coding block, a first number of palette predictor entries for a first image component of the current palette coding block and a second number of palette predictor entries for a second image component of the current palette coding block; determining the first number of palette predictor entries is greater than the second number of palette predictor entries; and based on the first number being greater than the second number, modifying the updated palette predictor to include a same number of palette predictor entries for the first and second image component.
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公开(公告)号:US11190764B2
公开(公告)日:2021-11-30
申请号:US16503089
申请日:2019-07-03
Applicant: QUALCOMM Incorporated
IPC: H04N19/117 , H04N19/11 , H04N19/176 , H04N19/61 , H04N19/91
Abstract: A video decoder may be configured to determine that a block of video data is coded using an intra prediction mode with position dependent intra prediction combination (PDPC); in response to the intra prediction mode being a particular intra prediction mode, apply a first filter to a first sample in a first reference line to obtain a first PDPC reference sample value; in response to the intra prediction mode being the particular intra prediction mode, apply a second filter to a second sample in a second reference line to obtain a second PDPC reference sample value; determine a predicted reference sample value based on the intra prediction mode; predict a sample of the block of video data based on the predicted reference sample value, the first PDPC reference sample value, and the second PDPC reference sample value.
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公开(公告)号:US20210360290A1
公开(公告)日:2021-11-18
申请号:US17319911
申请日:2021-05-13
Applicant: QUALCOMM Incorporated
Inventor: Vadim Seregin , Yong He , Muhammed Zeyd Coban , Adarsh Krishnan Ramasubramonian
IPC: H04N19/70 , H04N19/172 , H04N19/174
Abstract: Example techniques and devices are disclosed. An example device for coding video data includes memory configured to store the video data and one or more processors implemented in circuitry and coupled to the memory. The one or more processors are configured to determine whether an entry in a reference picture list for a current picture is equal to no reference picture. Based on the entry being equal to no reference picture, the one or more processors are configured to determine additional information associated with the entry. The one or more processors are configured to check a constraint for the entry based on the additional information and code the current picture in accordance with the constraint.
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57.
公开(公告)号:US11172195B2
公开(公告)日:2021-11-09
申请号:US16749554
申请日:2020-01-22
Applicant: QUALCOMM Incorporated
Inventor: Vadim Seregin
IPC: H04N19/105 , H04N19/136 , H04N19/593 , H04N19/176
Abstract: A rectangular block of video data is obtained, and the lengths of first and second sides of the block are determined. Intra-coded samples may be excluded from the first and/or second sides, or replaced with intra-coded samples from a reference block. Lengths of the first and second sides are determined based on non-excluded samples. Based on these lengths, a shortest or greatest side is selected. In some cases, additional samples may be excluded so that the total number of samples is a power of two. Illumination compensation parameters are determined based on remaining (non-excluded) samples neighboring the current block.
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公开(公告)号:US20210314624A1
公开(公告)日:2021-10-07
申请号:US17220418
申请日:2021-04-01
Applicant: QUALCOMM Incorporated
Inventor: Muhammed Zeyd Coban , Vadim Seregin , Yong He , Yao-Jen Chang
IPC: H04N19/70 , H04N19/105 , H04N19/169
Abstract: An example method includes decoding, from a picture header syntax structure of a coded video bitstream, a syntax element indicating whether or not a picture associated with the picture header syntax structure may include multiple different types of Network Abstraction Layer (NAL) units; responsive to the syntax element indicating that the picture may include multiple different types of NAL units, decoding a merged subpicture track that includes the picture where each picture in the merged subpicture track refers to a common picture parameter set (PPS); and reconstructing, based on the common PPS, samples of the picture.
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公开(公告)号:US20210306678A1
公开(公告)日:2021-09-30
申请号:US17210918
申请日:2021-03-24
Applicant: QUALCOMM Incorporated
Inventor: Hilmi Enes Egilmez , Alican Nalci , Vadim Seregin , Marta Karczewicz
IPC: H04N19/96 , H04N19/169 , H04N19/176 , H04N19/186
Abstract: An example video codec includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine that a current mode of coding a current block of the video data is a single tree partitioning mode. Based on the current mode being the single tree partitioning mode, the one or more processors are configured to refrain from determining whether there is a non-DC coefficient for a chroma component of a transform unit (TU) for the current block and refrain from coding a low-frequency non-separable transformation (LFNST) index in response to the refraining of the determination of whether there is the non-DC coefficient. The one or more processors are configured to code the current block in the single partitioning mode with LFNST disabled.
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公开(公告)号:US11109070B2
公开(公告)日:2021-08-31
申请号:US16948084
申请日:2020-09-02
Applicant: QUALCOMM Incorporated
Inventor: Yao-Jen Chang , Vadim Seregin , Muhammed Zeyd Coban , Adarsh Krishnan Ramasubramonian , Marta Karczewicz
IPC: H04N19/70 , H04N19/119 , H04N19/157 , H04N19/174 , H04N19/103
Abstract: An example device includes a memory configured to store video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors are configured to determine whether a maximum number of merge candidates for a slice of the video data is equal to a first value. The one or more processors are configured to infer a value of a first syntax element to be equal to a second value based at least in part on the maximum number of merge candidates for the slice being equal to the first value, the first syntax element being indicative of a maximum number of merge candidates and a maximum number of merge candidates of a non-rectangular coding mode. The one or more processors are also configured to decode the slice based on the maximum number of merge candidates and the first syntax element.
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