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公开(公告)号：US11474752B2
公开(公告)日：2022-10-18
申请号：US16932426
申请日：2020-07-17
Applicant: STMicroelectronics Application GmbH
Inventor： Roberto Colombo
Abstract: A processing system comprises a processing unit, a hardware block configured to change operation as a function of life cycle data, and a one-time programmable memory storing original life cycle data. A hardware configuration module is configured to read the original life cycle data from the one-time programmable memory, to store the original life cycle data in a register, to receive a write request from the processing unit, and to selectively execute the write request to overwrite the original life cycle data with new life cycle data in the register.
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公开(公告)号：US11210161B2
公开(公告)日：2021-12-28
申请号：US16928768
申请日：2020-07-14
Inventor： Roberto Colombo , Nicolas Bernard Grossier , Roberta Vittimani
Abstract: In some embodiments, a processing system includes at least one hardware block configured to change operation as a function of configuration data, a non-volatile memory including the configuration data for the at least one hardware block, and a configuration module configured to read the configuration data from the non-volatile memory and provide the configuration data read from the non-volatile memory to the at least one hardware block. The configuration module is configured to: receive mode configuration data; read the configuration data from the non-volatile memory; test whether the configuration data contain errors by verifying whether the configuration data are corrupted and/or invalid; and activate a normal operation mode or an error operation mode based on whether the configuration data contain or do not contain errors.
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公开(公告)号：US20210294534A1
公开(公告)日：2021-09-23
申请号：US17341054
申请日：2021-06-07
Inventor： Roberto Colombo , Om Ranjan
Abstract: A processing system includes a plurality of configuration data clients, each associated with a respective address and including a respective register, and where a respective configuration data client is configured to receive a respective first configuration data and to store the respective first configuration data in the respective register; a hardware block coupled to at least one of the configuration data clients and configured to change operation as a function of the respective first configuration data stored in the respective registers; a non-volatile memory including second configuration data, where the second configuration data are stored as data packets including the respective first configuration data and an attribute field identifying the respective address of one of the configuration data clients; and a hardware configuration circuit configured to sequentially read the data packets from the non-volatile memory and to transmit the respective first configuration data to the respective configuration data client.
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公开(公告)号：US11068331B2
公开(公告)日：2021-07-20
申请号：US16289425
申请日：2019-02-28
Applicant: STMicroelectronics Application GMBH
Inventor： Roberto Colombo
Abstract: A processing system includes a processing unit configured to be connected to a memory with error detection and/or correction. The processing unit generates at least one read request for reading data from the memory, the read request including an address signal identifying an address of a given memory area in the memory. The processing system includes an error handling circuit connected to the memory for receiving an error signal containing an error code indicating whether the data read from the memory contains errors. The error handling circuit includes a hardware circuit configured to set a first error signal to the error code of the error signal when the address indicated by the address signal belongs to a first address range and to set a second error signal to the error code of the error signal when the address indicated by the address signal belongs to a second address range.
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公开(公告)号：US10740041B2
公开(公告)日：2020-08-11
申请号：US15991208
申请日：2018-05-29
Applicant: STMicroelectronics Application GMBH
Inventor： Roberto Colombo
Abstract: A processing system includes a processing unit and a hardware block configured to change operation as a function of life cycle data. A one-time programmable memory includes original life cycle data. A hardware configuration module is configured to read the original life cycle data from the one-time programmable memory and provide the original life cycle data to the hardware block. The hardware configuration module includes a register providing the life cycle data used to change operation of the hardware block. The hardware configuration module is configured to store the original life cycle data in the register and receive a command from the processing unit. The command includes a write request for storing new life cycle data in the register.
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Patent Agency Ranking
公开(公告)号：US20190272210A1
公开(公告)日：2019-09-05
申请号：US16289405
申请日：2019-02-28
Applicant: STMicroelectronics Application GMBH
Inventor： Roberto Colombo
IPC: G06F11/07
Abstract: A processing system includes a plurality of circuits configured to generate a plurality of error signals. The processing system further includes a plurality of error pads and a fault collection circuit configured to receive the plurality of error signals and to generate a respective combined error signal for each of the plurality of error pads. The fault collection circuit includes a combinational logic circuit configured to generate the combined error signal by selectively routing the plurality of error signals to the plurality of error pads as a function of a set of configuring bits.
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公开(公告)号：US20190258493A1
公开(公告)日：2019-08-22
申请号：US16273704
申请日：2019-02-12
Inventor： Roberto Colombo , Om RANJAN
Abstract: A processing system includes a plurality of configuration data clients, each associated with a respective address and including a respective register, and where a respective configuration data client is configured to receive a respective first configuration data and to store the respective first configuration data in the respective register; a hardware block coupled to at least one of the configuration data clients and configured to change operation as a function of the respective first configuration data stored in the respective registers; a non-volatile memory including second configuration data, where the second configuration data are stored as data packets including the respective first configuration data and an attribute field identifying the respective address of one of the configuration data clients; and a hardware configuration circuit configured to sequentially read the data packets from the non-volatile memory and to transmit the respective first configuration data to the respective configuration data client.
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公开(公告)号：US20190227747A1
公开(公告)日：2019-07-25
申请号：US16249524
申请日：2019-01-16
Applicant: STMicroelectronics Application GMBH
Inventor： Roberto Colombo
IPC: G06F3/06
Abstract: A processing system includes a plurality of configuration data clients, each of the plurality of configuration data clients having a register and being associated with a respective address. The system includes a non-volatile memory with configuration data for each of the plurality of configuration data clients. The configuration data is stored as data packets having an attribute field identifying the respective address of the plurality of configuration data clients and the respective configuration data. A hardware configuration circuit is configured to sequentially read the data packets from the non-volatile memory and transmit the respective configuration data read from the non-volatile memory to the respective configuration data client. The configuration data client is configured to receive a first set of configuration data addressed to the respective address from the hardware configuration circuit and store the first set of configuration data in the respective register. The configuration data client is configured to receive a second set of configuration data addressed to the respective address from the hardware configuration circuit, and verify whether further configuration data may be written to the respective register as a function of a type identification signal. In response to verifying that further configuration data may be written to the respective register, the configuration data client is configured to overwrite the first set of configuration data by storing the second set of configuration data in the respective register. In response to verifying that further configuration data may not be written to the respective register, the configuration data client is configured to maintain the first set of configuration data by inhibiting storage of the second set of configuration data received in the respective register.
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公开(公告)号：US20190026498A1
公开(公告)日：2019-01-24
申请号：US16039103
申请日：2018-07-18
Applicant: STMicroelectronics Application GmbH
Inventor： Roberto Colombo
Abstract: In an embodiment, a processing system includes a non-volatile memory, a hardware block, a protection circuit associated with the hardware block, and a password verification circuit. The non-volatile memory stores at least one reference password. The password verification circuit is configured to receive a password verification command, obtain a reference password, and test whether the passwords correspond. In case the passwords correspond, the password verification circuit generate an overwrite signal. The protection circuit is configured to receive a control command and selectively forward the control command to the associated hardware block as a function of the overwrite signal.
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公开(公告)号：US20180357015A1
公开(公告)日：2018-12-13
申请号：US15991208
申请日：2018-05-29
Applicant: STMicroelectronics Application GMBH
Inventor： Roberto Colombo
CPC classification number: G06F3/0679 , G05B19/056 , G06F12/0246 , G06F13/38 , G06F21/76
Abstract: A processing system includes a processing unit and a hardware block configured to change operation as a function of life cycle data. A one-time programmable memory includes original life cycle data. A hardware configuration module is configured to read the original life cycle data from the one-time programmable memory and provide the original life cycle data to the hardware block. The hardware configuration module includes a register providing the life cycle data used to change operation of the hardware block. The hardware configuration module is configured to store the original life cycle data in the register and receive a command from the processing unit. The command includes a write request for storing new life cycle data in the register.
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